Patents by Inventor Satoshi Yazawa

Satoshi Yazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10234929
    Abstract: A first control apparatus includes a first memory unit including a local cache, a first power supply that supplies electric power to the first memory unit, and a control unit. The control unit controls a write into a memory device by a write-back method, using the local cache. The control unit mirrors data of the local cache in a mirror cache of a second control apparatus. The control unit determines whether the mirror cache is included in a second memory unit that receives electric power from a second power supply of the second control apparatus, upon detecting an abnormal state of a battery for supplying electric power to the second memory unit in case of power outage of the second power supply. The second memory unit switches write control for the memory device to a write-through method, when the second memory unit includes the mirror cache.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: March 19, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Hidefumi Kobayashi, Satoshi Yazawa, Atsushi Igashira, Wataru Iizuka, Motohiro Sakai, Akihito Kobayashi, Shinichiro Matsumura, Kenji Kobayashi
  • Patent number: 9916242
    Abstract: A storage system includes control devices and a second processor. The second processor determines a number of abnormal batteries when an abnormality has occurred in a first battery. The second processor assigns a second cache currently assigned to a second control device associated with the first battery to a first control device when the number is smaller than a threshold. The second processor assigns a mirror cache currently assigned to the second control device to a third control device when the number is smaller than the threshold. The second processor instructs the first control device to control write to a first storage device associated with a first cache by using the first cache. Data of the first cache is mirrored to the mirror cache. The second processor instructs the first control device to control write to a second storage device associated with the second cache by using the second cache.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: March 13, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Yasuhiro Ogasawara, Hidetoshi Nishi, Shigeru Akiyama, Tsukasa Matsuda, Tatsuya Yanagisawa, Hidefumi Kobayashi, Satoshi Yazawa, Atsushi Igashira, Wataru Iizuka
  • Publication number: 20170132129
    Abstract: A storage system includes control devices and a second processor. The second processor determines a number of abnormal batteries when an abnormality has occurred in a first battery. The second processor assigns a second cache currently assigned to a second control device associated with the first battery to a first control device when the number is smaller than a threshold. The second processor assigns a mirror cache currently assigned to the second control device to a third control device when the number is smaller than the threshold. The second processor instructs the first control device to control write to a first storage device associated with a first cache by using the first cache. Data of the first cache is mirrored to the mirror cache. The second processor instructs the first control device to control write to a second storage device associated with the second cache by using the second cache.
    Type: Application
    Filed: October 27, 2016
    Publication date: May 11, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Yasuhiro Ogasawara, Hidetoshi Nishi, Shigeru Akiyama, Tsukasa Matsuda, Tatsuya Yanagisawa, Hidefumi Kobayashi, Satoshi Yazawa, Atsushi Igashira, Wataru Iizuka
  • Publication number: 20160321175
    Abstract: A first control apparatus includes a first memory unit including a local cache, a first power supply that supplies electric power to the first memory unit, and a control unit. The control unit controls a write into a memory device by a write-back method, using the local cache. The control unit mirrors data of the local cache in a mirror cache of a second control apparatus. The control unit determines whether the mirror cache is included in a second memory unit that receives electric power from a second power supply of the second control apparatus, upon detecting an abnormal state of a battery for supplying electric power to the second memory unit in case of power outage of the second power supply. The second memory unit switches write control for the memory device to a write-through method, when the second memory unit includes the mirror cache.
    Type: Application
    Filed: March 23, 2016
    Publication date: November 3, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Hidefumi Kobayashi, SATOSHI YAZAWA, Atsushi IGASHIRA, Wataru Iizuka, Motohiro Sakai, Akihito Kobayashi, Shinichiro Matsumura, Kenji KOBAYASHI
  • Patent number: 8972996
    Abstract: A processing function determination section included in an information processing apparatus determines a differential processing function which is a processing function that is realized by a first program and that is not realized by a second program. A control information determination section reads out relation information which associates a plurality of processing functions with one or more pieces of control information related to each of the plurality of processing functions from a storage section and determines a piece of control information related to the differential processing function on the basis of the relation information.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: March 3, 2015
    Assignee: Fujitsu Limited
    Inventors: Hirokazu Matsubayashi, Shoji Oshima, Tatsuhiko Machida, Satoshi Yazawa, Kouichi Tsukada
  • Patent number: 8918438
    Abstract: A collection unit collects attribute information of each of a plurality of electronic devices, and registers the collected attribute information in mounted device information correspondingly to a mounting position of the electronic device in a management system.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: December 23, 2014
    Assignee: Fujitsu Limited
    Inventors: Hirokazu Matsubayashi, Shoji Oshima, Tatsuhiko Machida, Yukari Tsuchiyama, Satoshi Yazawa
  • Patent number: 8255662
    Abstract: A reference-capacity calculating unit calculates a reference capacity of each of storage devices storing therein data on the basis of an actual capacity of each storage device. A difference calculating unit calculates a difference value between the reference capacity calculated by the reference-capacity calculating unit and the actual capacity of each storage device. A maximum-value retrieving unit retrieves the maximum difference value out of the respective difference values of the storage devices calculated by the difference calculating unit. A defined-capacity determining unit determines a defined capacity, which is an actually-used capacity of each storage device, on the basis of a value obtained by subtracting the maximum difference value from the reference capacity calculated by the reference-capacity calculating unit.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: August 28, 2012
    Assignee: Fujitsu Limited
    Inventors: Kouichi Tsukada, Satoshi Yazawa, Shoji Oshima, Tatsuhiko Machida, Hirokazu Matsubayashi
  • Publication number: 20110202923
    Abstract: A processing function determination section included in an information processing apparatus determines a differential processing function which is a processing function that is realized by a first program and that is not realized by a second program. A control information determination section reads out relation information which associates a plurality of processing functions with one or more pieces of control information related to each of the plurality of processing functions from a storage section and determines a piece of control information related to the differential processing function on the basis of the relation information.
    Type: Application
    Filed: February 10, 2011
    Publication date: August 18, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Hirokazu MATSUBAYASHI, Shoji OSHIMA, Tatsuhiko MACHIDA, Satoshi YAZAWA, Kouichi TSUKADA
  • Publication number: 20110170392
    Abstract: A reference-capacity calculating unit calculates a reference capacity of each of storage devices storing therein data on the basis of an actual capacity of each storage device. A difference calculating unit calculates a difference value between the reference capacity calculated by the reference-capacity calculating unit and the actual capacity of each storage device. A maximum-value retrieving unit retrieves the maximum difference value out of the respective difference values of the storage devices calculated by the difference calculating unit. A defined-capacity determining unit determines a defined capacity, which is an actually-used capacity of each storage device, on the basis of a value obtained by subtracting the maximum difference value from the reference capacity calculated by the reference-capacity calculating unit.
    Type: Application
    Filed: December 23, 2010
    Publication date: July 14, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Kouichi TSUKADA, Satoshi Yazawa, Shoji Oshima, Tatsuhiko Machida, Hirokazu Matsubayashi
  • Patent number: 7779203
    Abstract: For each RAID group to be determined for blocking, each disk is classified into three types of totalization unit based on the status of each disk belonging to the RAID group or the presence/absence of an access path to each disk, and the number of disks corresponding to each totalization unit is totalized. The totalization unit is a “used disk”, an “unused disk”, and a “loop-down disk”. The totalization result is compared with the threshold condition set for each RAID level (for example, “unused disk”=0 and “loop-down disk”=‘1 or more’), and the blocking possibility is determined.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: August 17, 2010
    Assignee: Fujitsu Limited
    Inventors: Koichi Tsukada, Satoshi Yazawa, Shoji Oshima, Tatsuhiko Machida, Hirokazu Matsubayashi
  • Publication number: 20080010403
    Abstract: A disk incorporation process unit 54 shares information (i.e., a common table) managed by a disk statistics unit 53 and judges whether or not to permit an incorporation of an installed disk by referring to the common table in the event of a discretionary disk having been isolated followed by the aforementioned disk being installed.
    Type: Application
    Filed: October 27, 2006
    Publication date: January 10, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Koichi Tsukada, Satoshi Yazawa, Shoji Oshima, Tatsuhiko Machida, Hirokazu Matsubayashi
  • Publication number: 20080010495
    Abstract: For each RAID group to be determined for blocking, each disk is classified into three types of totalization unit based on the status of each disk belonging to the RAID group or the presence/absence of an access path to each disk, and the number of disks corresponding to each totalization unit is totalized. The totalization unit is a “used disk”, an “unused disk”, and a “loop-down disk”. The totalization result is compared with the threshold condition set for each RAID level (for example, “unused disk”=0 and “loop-down disk”=‘1 or more’), and the blocking possibility is determined.
    Type: Application
    Filed: September 29, 2006
    Publication date: January 10, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Koichi Tsukada, Satoshi Yazawa, Shoji Oshima, Tatsuhiko Machida, Hirokazu Matsubayashi
  • Publication number: 20060282638
    Abstract: A storage system is comprised of a first processing unit (main CPU) comprising a first input/output control unit and a configuration management unit as execution targets, a second processing unit (sub CPU) comprising a second input/output control unit and a higher-priority control unit which has an execution priority higher than the second input/output control unit as execution targets, and a shared memory which is allocated with a configuration table storing configuration information.
    Type: Application
    Filed: September 12, 2005
    Publication date: December 14, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Shoji Oshima, Tatsuhiko Machida, Hirokazu Matsubayashi, Satoshi Yazawa, Koichi Tsukada
  • Patent number: 6408400
    Abstract: A disc array device for maintaining consistency of data. When write processing is interrupted and then restarted, new data may be stored in a nonvolatile memory and regeneration of parity may be impossible because data can not be read out normally from a disc device other than a disc device in which new data is to be written and a disk device for parity. In such a case, a special write executing unit overwrites the new data stored in the nonvolatile memory at a specified write position of the disk device in which new data is to be written.
    Type: Grant
    Filed: April 23, 1998
    Date of Patent: June 18, 2002
    Assignee: Fujitsu Limited
    Inventors: Suijin Taketa, Yuuichi Tarouda, Tatsuhiko Machida, Sawao Iwatani, Keiichi Yorimitsu, Sanae Kamakura, Satoshi Yazawa, Takuya Kurihara, Yasuyoshi Sugesawa
  • Publication number: 20020007469
    Abstract: When write processing once interrupted is restarted, if new data is stored in a nonvolatile memory 34 and regeneration of parity is impossible because data can not be read out normally from a third disk device (for instance 32-2) other than a disk device (for instance 32-1) in which new data is to be written and a disk device (for instance 32-5) for parity, a data writing unit 113 in a special write executing unit 110 overwrites the new data stored in the nonvolatile memory 34 at a specified write position of an appropriate disk device (for instance 32-1).
    Type: Application
    Filed: April 23, 1998
    Publication date: January 17, 2002
    Applicant: Fujitsu Limited
    Inventors: SUIJIN TAKETA, YUUICHI TAROUDA, TATSUHIKO MACHIDA, SAWAO IWATANI, KEIICHI YORIMITSU, SANAE KAMAKURA, SATOSHI YAZAWA, TAKUYA KURIHARA, YASUYOSHI SUGESAWA