Patents by Inventor Satsheel B. Altekar
Satsheel B. Altekar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9971617Abstract: Various embodiments provide for a system that integrates 64 bit ARM cores and a switch on a single chip. The RISC style processors use highly optimized sets of instructions rather than the specialized set of instructions found in other architectures (e.g., x86). The system also includes multiple high bandwidth ports that enable multi-ported virtual appliances to be built using a single chip. The virtual appliances are software implemented versions of the physical appliances that are installed with servers to provide network services such routing and switching services, firewall, VPN, SSL, and other security services, as well as load balancing. The virtual appliances are implemented in software and the system can add new virtual appliances, or change the functions performed by existing virtual appliances flexibly without having to install or remove physical hardware.Type: GrantFiled: March 15, 2013Date of Patent: May 15, 2018Assignee: Ampere Computing LLCInventors: Venkatesh Nagapudi, Satsheel B. Altekar
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Publication number: 20170097838Abstract: Various embodiments provide for a system that integrates 64 bit ARM cores and a switch on a single chip. The RISC style processors use highly optimized sets of instructions rather than the specialized set of instructions found in other architectures (e.g., x86). The system also includes multiple high bandwidth ports that enable multi-ported virtual appliances to be built using a single chip. The virtual appliances are software implemented versions of the physical appliances that are installed with servers to provide network services such routing and switching services, firewall, VPN, SSL, and other security services, as well as load balancing. The virtual appliances are implemented in software and the system can add new virtual appliances, or change the functions performed by existing virtual appliances flexibly without having to install or remove physical hardware.Type: ApplicationFiled: March 15, 2013Publication date: April 6, 2017Applicant: APPLIED MICRO CIRCUITS CORPORATIONInventors: Venkatesh Nagapudi, Satsheel B. Altekar
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Patent number: 9154394Abstract: A switch creates and dynamically updates a latency map of a network to adjust routing of flows. Further, the network is monitored to detect latency issues and trigger a dynamic adjustment of routing based on the latency map. In this manner, a flow can be routed along a route (i.e., a faster route) that provides less latency than other available routes. The latency map can be generated based on latency probe packets that are issued from and returned to the source switch. By evaluating many such latent probe packets that have traveled along many available routes (e.g., corresponding to various ports of the switch), the switch or associated administrative logic can dynamically adjust the latency map to updated latency information of available routes. Therefore, responsive to a trigger, the source switch can dynamically adjust the routing of a flow based on latency issues discerned from the network.Type: GrantFiled: September 28, 2010Date of Patent: October 6, 2015Assignee: BROCADE COMMUNICATIONS SYSTEMS, INC.Inventors: Kung-Ling Ko, Surya Prakash Varanasi, Satsheel B. Altekar, John Michael Terry, Vankata Pramod Balakavi
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Patent number: 8427958Abstract: A switch creates and dynamically updates a latency map of a network to adjust routing of flows. Further, the network is monitored to detect latency issues and trigger a dynamic adjustment of routing based on the latency map. In this manner, a flow can be routed along a route (i.e., a faster route) that provides less latency than other available routes. The latency map can be generated based on latency probe packets that are issued from and returned to the source switch. By evaluating many such latent probe packets that have traveled along many available routes (e.g., corresponding to various ports of the switch), the switch or associated administrative logic can dynamically adjust the latency map to updated latency information of available routes. Therefore, responsive to a trigger, the source switch can dynamically adjust the routing of a flow based on latency issues discerned from the network.Type: GrantFiled: April 30, 2010Date of Patent: April 23, 2013Assignee: Brocade Communications Systems, Inc.Inventors: Kung-Ling Ko, Surya Prakash Varanasi, Satsheel B. Altekar, John Michael Terry, Venkata Pramod Balakavi
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Publication number: 20120099602Abstract: One embodiment of the present invention provides a system that facilitates end-to-end virtualization. During operation, a network interface residing on an end host sets up a tunnel. The network interface then encapsulates a packet destined to a virtual machine based on a tunneling protocol. By establishing a tunnel that allows a source host to address a remote virtual machine, embodiments of the present invention facilitate end-to-end virtualization.Type: ApplicationFiled: June 10, 2011Publication date: April 26, 2012Applicant: BROCADE COMMUNICATIONS SYSTEMS, INC.Inventors: Venkatesh Nagapudi, Satsheel B. Altekar
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Publication number: 20120096310Abstract: A network system provides network device having a secondary memory that mirrors the content of a primary memory maintaining data structure parameters entries. The integrity of each data structure parameter entry is tested as the entry is output from the primary memory, such as by using a parity test. If an error is detected in the entry, a corresponding entry from the second memory structure is select for use instead of the entry from the primary memory. The corresponding entries in each memory are then flushed, updated, synchronized, or overwritten from the each memory and processing continues using the new entries or other entries from the primary memory. In the rare instance that corresponding entries from both memories exhibit an error, then an error notification is issued.Type: ApplicationFiled: October 18, 2010Publication date: April 19, 2012Applicant: BROCADE COMMUNICATIONS SYSTEMS, INC.Inventors: Surya Prakash Varanasi, Kung-Ling Ko, Satsheel B. Altekar, Venkata Pramod Balakavi
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Publication number: 20120075999Abstract: A switch creates and dynamically updates a latency map of a network to adjust routing of flows. Further, the network is monitored to detect latency issues and trigger a dynamic adjustment of routing based on the latency map. In this manner, a flow can be routed along a route (i.e., a faster route) that provides less latency than other available routes. The latency map can be generated based on latency probe packets that are issued from and returned to the source switch. By evaluating many such latent probe packets that have traveled along many available routes (e.g., corresponding to various ports of the switch), the switch or associated administrative logic can dynamically adjust the latency map to updated latency information of available routes. Therefore, responsive to a trigger, the source switch can dynamically adjust the routing of a flow based on latency issues discerned from the network.Type: ApplicationFiled: September 28, 2010Publication date: March 29, 2012Applicant: BROCADE COMMUNICATIONS SYSTEMS, INC.Inventors: Kung-Ling Ko, Surya Prakash Varanasi, Satsheel B. Altekar, John Michael Terry, Vankata Pramod Balakavi
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Publication number: 20110267952Abstract: A switch creates and dynamically updates a latency map of a network to adjust routing of flows. Further, the network is monitored to detect latency issues and trigger a dynamic adjustment of routing based on the latency map. In this manner, a flow can be routed along a route (i.e., a faster route) that provides less latency than other available routes. The latency map can be generated based on latency probe packets that are issued from and returned to the source switch. By evaluating many such latent probe packets that have traveled along many available routes (e.g., corresponding to various ports of the switch), the switch or associated administrative logic can dynamically adjust the latency map to updated latency information of available routes. Therefore, responsive to a trigger, the source switch can dynamically adjust the routing of a flow based on latency issues discerned from the network.Type: ApplicationFiled: April 30, 2010Publication date: November 3, 2011Applicant: Brocade Communications Systems, Inc.Inventors: Kung-Ling Ko, Surya Prakash Varanasi, Satsheel B. Altekar, John Michael Terry, Venkata Pramod Balakavi