Patents by Inventor Saurabh Singh
Saurabh Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11775334Abstract: Methods and apparatuses are described for provisioning and managing data orchestration platforms in a cloud computing environment. A server provisions in a first region a first data orchestration platform comprising (i) a first data transformation instance, (ii) first endpoints, and (iii) a first data integration instance. The server provisions in a second region a second data orchestration platform comprising (i) a second data transformation instance, (ii) second endpoints, and (iii) a second data integration instance. The server integrates the first data integration instance and the second data integration instance with an identity authentication service. The server monitors operational status of the first orchestration platform and the second orchestration platform using a monitoring service. The server refreshes virtual computing resources in each of the first orchestration platform and the second orchestration platform using a rehydration service.Type: GrantFiled: January 10, 2023Date of Patent: October 3, 2023Assignee: FMR LLCInventors: Terence Doherty, Saurabh Singh, Aniruththan Somu Duraisamy, Digvijay Narayan Singh, Avinash Mysore Geethananda, Aravind Ganesan
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Publication number: 20230288196Abstract: A system to characterize a film layer within a measurement box is disclosed. The system obtains a first mixing fraction corresponding to a first X-ray beam, the mixing fraction represents a fraction of the first X-ray beam inside a measurement box of a wafer sample, the measurement box represents a bore structure disposed over a substrate and having a film layer disposed inside the bore structure. The system obtains a contribution value for the measurement box corresponding to the first X-ray beam, the contribution value representing a species signal outside the measurement box that contributes to a same species signal inside the measurement box. The system obtains a first measurement detection signal corresponding to a measurement of the measurement box using the first X-ray beam. The system determines a measurement value of the film layer based on the first measurement detection signal, the contribution value, and the first mixing fraction.Type: ApplicationFiled: October 24, 2022Publication date: September 14, 2023Applicant: NOVA MEASURING INSTRUMENTS INC.Inventors: Heath POIS, Wei Ti LEE, Laxmi WARAD, Dmitry Kislitsyn, Parker Lund, Benny Tseng, James CHEN, Saurabh Singh
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Publication number: 20230237332Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for receiving, by a neural network (NN), a dataset for generating features from the dataset. A first set of features is computed from the dataset using at least a feature layer of the NN. The first set of features i) is characterized by a measure of informativeness; and ii) is computed such that a size of the first set of features is compressible into a second set of features that is smaller in size than the first set of features and that has a same measure of informativeness as the measure of informativeness of the first set of features. The second set of features if generated from the first set of features using a compression method that compresses the first set of features to generate the second set of features.Type: ApplicationFiled: February 27, 2023Publication date: July 27, 2023Inventors: Abhinav Shrivastava, Saurabh Singh, Johannes Ballé, Sami Ahmad Abu-El-Haija, Nicholas Milo Johnston, George Dan Toderici
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Publication number: 20230206512Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for channel-wise autoregressive entropy models. In one aspect, a method includes processing data using a first encoder neural network to generate a latent representation of the data. The latent representation of data is processed by a quantizer and a second encoder neural network to generate a quantized latent representation of data and a latent representation of an entropy model. The latent representation of data is further processed into a plurality of slices of quantized latent representations of data wherein the slices are arranged in an ordinal sequence. A hyperprior processing network generates a hyperprior parameters and a compressed representation of the hyperprior parameters. For each slice, a corresponding compressed representation is generated using a corresponding slice processing network wherein a combination of the compressed representations form a compressed representation of the data.Type: ApplicationFiled: December 23, 2022Publication date: June 29, 2023Inventors: David Charles Minnen, Saurabh Singh
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Publication number: 20230186166Abstract: Example aspects of the present disclosure are directed to systems and methods that learn a compressed representation of a machine-learned model (e.g., neural network) via representation of the model parameters within a reparameterization space during training of the model. In particular, the present disclosure describes an end-to-end model weight compression approach that employs a latent-variable data compression method. The model parameters (e.g., weights and biases) are represented in a “latent” or “reparameterization” space, amounting to a reparameterization. In some implementations, this space can be equipped with a learned probability model, which is used first to impose an entropy penalty on the parameter representation during training, and second to compress the representation using arithmetic coding after training. The proposed approach can thus maximize accuracy and model compressibility jointly, in an end-to-end fashion, with the rate-error trade-off specified by a hyperparameter.Type: ApplicationFiled: February 6, 2023Publication date: June 15, 2023Inventors: Deniz Oktay, Saurabh Singh, Johannes Balle, Abhinav Shrivistava
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Patent number: 11670010Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for compressing and decompressing data. In one aspect, a method comprises: processing data using an encoder neural network to generate a latent representation of the data; processing the latent representation of the data using a hyper-encoder neural network to generate a latent representation of an entropy model; generating an entropy encoded representation of the latent representation of the entropy model; generating an entropy encoded representation of the latent representation of the data using the latent representation of the entropy model; and determining a compressed representation of the data from the entropy encoded representations of: (i) the latent representation of the data and (ii) the latent representation of the entropy model used to entropy encode the latent representation of the data.Type: GrantFiled: January 19, 2022Date of Patent: June 6, 2023Assignee: Google LLCInventors: David Charles Minnen, Saurabh Singh, Johannes Balle, Troy Chinen, Sung Jin Hwang, Nicholas Johnston, George Dan Toderici
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Publication number: 20230168973Abstract: An intermittent network connection between a source system and a destination system is established by establishing a first connection from a management resource to a first port of the destination system, causing a second port of the destination system to be enabled including by proving an instruction via the first connection to the first port of the destination system, establishing a second connection from the management resource to a first port of a source system, causing a second port of the source system to be enabled including by providing an instruction via the second connection to the first port of the source system, registering the destination system with the source system, and causing a third connection to be established between the second port of the source system and the second port of the destination system for transferring data from the source system to the destination system.Type: ApplicationFiled: November 30, 2021Publication date: June 1, 2023Inventors: Karthick Radhakrishnan, Saurabh Singh
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Publication number: 20230154051Abstract: Systems and methods are directed to encoding and/or decoding of the textures/geometry of a three-dimensional volumetric representation. An encoding computing system can obtain voxel blocks from a three-dimensional volumetric representation of an object. The encoding computing system can encode voxel blocks with a machine-learned voxel encoding model to obtain encoded voxel blocks. The encoding computing system can decode the encoded voxel blocks with a machine-learned voxel decoding model to obtain reconstructed voxel blocks. The encoding computing system can generate a reconstructed mesh representation of the object based at least in part on the one or more reconstructed voxel blocks. The encoding computing system can encode textures associated with the voxel blocks according to an encoding scheme and based at least in part on the reconstructed mesh representation of the object to obtain encoded textures.Type: ApplicationFiled: April 17, 2020Publication date: May 18, 2023Inventors: Danhang Tang, Saurabh Singh, Cem Keskin, Phillip Andrew Chou, Christian Haene, Mingsong Dou, Sean Ryan Francesco Fanello, Jonathan Taylor, Andrea Tagliasacchi, Philip Lindsley Davidson, Yinda Zhang, Onur Gonen Guleryuz, Shahram Izadi, Sofien Bouaziz
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Patent number: 11644493Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.Type: GrantFiled: February 10, 2022Date of Patent: May 9, 2023Assignee: Cirrus Logic, Inc.Inventors: Saurabh Singh, Chandra B. Prakash, Eric Kimball, Cory J. Peterson, Ryan Lobo
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Patent number: 11610124Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for receiving, by a neural network (NN), a dataset for generating features from the dataset. A first set of features is computed from the dataset using at least a feature layer of the NN. The first set of features i) is characterized by a measure of informativeness; and ii) is computed such that a size of the first set of features is compressible into a second set of features that is smaller in size than the first set of features and that has a same measure of informativeness as the measure of informativeness of the first set of features. The second set of features if generated from the first set of features using a compression method that compresses the first set of features to generate the second set of features.Type: GrantFiled: October 29, 2019Date of Patent: March 21, 2023Assignee: Google LLCInventors: Abhinav Shrivastava, Saurabh Singh, Johannes Balle, Sami Ahmad Abu-El-Haija, Nicholas Johnston, George Dan Toderici
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Publication number: 20230041074Abstract: A method performed by a central server node in a distributed machine learning environment is provided. The method includes: managing distributed machine learning for a plurality of local client nodes, such that a first set of the plurality of local client nodes are assigned to assist training of a first central model and a second set of the plurality of local client nodes are assigned to assist training of a second central model; obtaining information regarding network conditions for the plurality of local client nodes; clustering the plurality of local client nodes into one or more clusters based at least in part on the information regarding network conditions; re-assigning a local client node in the first set to the second set based on the clustering; and sending to the local client node a message including model weights for the second central model.Type: ApplicationFiled: January 10, 2020Publication date: February 9, 2023Applicant: Telefonaktiebolaget LM Ericsson (publ)Inventors: Farnaz MORADI, Saurabh SINGH, Selim ICKIN, Wenfeng HU
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Patent number: 11574232Abstract: Example aspects of the present disclosure are directed to systems and methods that learn a compressed representation of a machine-learned model (e.g., neural network) via representation of the model parameters within a reparameterization space during training of the model. In particular, the present disclosure describes an end-to-end model weight compression approach that employs a latent-variable data compression method. The model parameters (e.g., weights and biases) are represented in a “latent” or “reparameterization” space, amounting to a reparameterization. In some implementations, this space can be equipped with a learned probability model, which is used first to impose an entropy penalty on the parameter representation during training, and second to compress the representation using arithmetic coding after training. The proposed approach can thus maximize accuracy and model compressibility jointly, in an end-to-end fashion, with the rate-error trade-off specified by a hyperparameter.Type: GrantFiled: May 13, 2020Date of Patent: February 7, 2023Assignee: GOOGLE LLCInventors: Deniz Oktay, Saurabh Singh, Johannes Balle, Abhinav Shrivastava
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Publication number: 20230031363Abstract: A method may include receiving, by a calibration circuit, an output of a subsystem comprising the sensor and the analog front end. The method may further include separating the output individually into the sensor offset and the amplifier offset by using inherent properties of separate frequency ranges for the sensor offset and the amplifier offset. The method may also include calibrating, by the calibration circuit, the sensor offset by determining a first calibration value for the sensor offset such that the output approximates zero during an idle-channel condition. The method may additionally include calibrating, by the calibration circuit, the amplifier offset by determining a second calibration value for the amplifier offset such that the output approximates zero during the idle-channel condition.Type: ApplicationFiled: January 11, 2022Publication date: February 2, 2023Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Saurabh SINGH, Chandra B. PRAKASH
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Patent number: 11557690Abstract: Semitransparent chalcogen solar cells and techniques for fabrication thereof are provided. In one aspect, a method of forming a solar cell includes: forming a first transparent contact on a substrate; depositing an n-type layer on the first transparent contact; depositing a p-type chalcogen absorber layer on the n-type layer, wherein a p-n junction is formed between the p-type chalcogen absorber layer and the n-type layer; depositing a protective interlayer onto the p-type chalcogen absorber layer, wherein the protective interlayer fully covers the p-type chalcogen absorber layer; and forming a second transparent contact on the interlayer, wherein the interlayer being disposed between the p-type chalcogen absorber layer and the second transparent contact serves to protect the p-n junction during the forming of the second transparent contact. Solar cells and other methods for formation thereof are also provided.Type: GrantFiled: April 13, 2020Date of Patent: January 17, 2023Assignee: International Business Machines CorporationInventors: Douglas M. Bishop, Yun Seog Lee, Saurabh Singh, Teodor K. Todorov
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Publication number: 20230003779Abstract: A method for estimating resistances of a circuit having a plurality of resistances comprising a first resistance and a second resistance may include applying a first bias voltage across the circuit and measuring a first voltage at a common node between the first resistance and the second resistance in order to determine a mathematical relationship between the first resistance and the second resistance, applying a second bias voltage across the circuit and a third resistance in parallel with the circuit and measuring a second voltage at the common node between the first resistance and the second resistance in order to determine a mathematical relationship between the third resistance and at least one of the first resistance and the second resistance, and based on at least the measurement of the first voltage and the measurement of the second voltage, determining the first resistance and the second resistance as a function of the third resistance.Type: ApplicationFiled: February 10, 2022Publication date: January 5, 2023Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Saurabh SINGH, Chandra B. PRAKASH, Eric KIMBALL, Cory J. PETERSON, Ryan LOBO
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Patent number: 11536767Abstract: The present disclosure relates to self-test circuitry for a system that includes one or more current control subsystems, each current control subsystem having a load terminal for coupling the current control subsystem to a load. The self-test circuitry comprises: a signal path associated with each current control subsystem, each signal path configured to selectively couple a measurement node to the load terminal of the current control subsystem, wherein the measurement node is common to all of the signal paths; voltage detection circuitry; and test voltage source circuitry configured to provide a test voltage to the measurement node. The voltage detection circuitry is operable to output a signal indicative of a fault condition if a voltage detected at the measurement node differs from the test voltage when the measurement node is coupled to the load terminal.Type: GrantFiled: October 8, 2020Date of Patent: December 27, 2022Assignee: Cirrus Logic, Inc.Inventors: James Wells, Saurabh Singh, Huy Binh Le, Gavin Wilson, Niall McGurnaghan, Simon R. Foster, Mark McCloy-Stevens
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Patent number: 11538197Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for channel-wise autoregressive entropy models. In one aspect, a method includes processing data using a first encoder neural network to generate a latent representation of the data. The latent representation of data is processed by a quantizer and a second encoder neural network to generate a quantized latent representation of data and a latent representation of an entropy model. The latent representation of data is further processed into a plurality of slices of quantized latent representations of data wherein the slices are arranged in an ordinal sequence. A hyperprior processing network generates a hyperprior parameters and a compressed representation of the hyperprior parameters. For each slice, a corresponding compressed representation is generated using a corresponding slice processing network wherein a combination of the compressed representations form a compressed representation of the data.Type: GrantFiled: September 15, 2020Date of Patent: December 27, 2022Assignee: Google LLCInventors: David Charles Minnen, Saurabh Singh
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Publication number: 20220353970Abstract: The present disclosure relates to current control circuitry for controlling a current through a load, the current control circuitry comprising: amplifier circuitry; reference voltage generator circuitry configured to supply a fixed reference voltage to a first input of the amplifier circuitry; an output stage comprising: a control terminal coupled to an output of the amplifier circuitry; a current input terminal configured to be coupled to the load; a current output terminal; a clock-controlled variable resistance coupled to the current output terminal of the output stage, wherein a resistance of the variable resistance is based on a digital code input to the variable resistance; and a feedback path between the current output terminal of the output stage and a second terminal of the amplifier circuitry for providing a feedback voltage to a second input of the amplifier circuitry.Type: ApplicationFiled: July 8, 2022Publication date: November 3, 2022Applicant: Cirrus Logic International Semiconductor Ltd.Inventors: Dave SMITH, Saurabh SINGH, Andrew BUIST, Paulius CEREBIEJUS, Mark J. MCCLOY-STEVENS, Terence A. ORR
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Publication number: 20220343167Abstract: A method of performing federated feature selection for a machine learning model in a federated learning environment includes obtaining, at a first resolution, a global set of selector neural network weights. At a second resolution, the method selects, for a plurality of first data subsets, a first set of features from a feature space by iteratively applying a first selector neural network that is initialized with the global set of selector neural network weights to the first data subset to obtain a first set of selector neural network weights. The first data subsets are divided into a plurality of second data subsets, and, at a third resolution, a second set of features is selected from the feature space.Type: ApplicationFiled: October 30, 2020Publication date: October 27, 2022Inventors: Deepa CHAWLA, Gaurav DIXIT, Wenfeng HU, Selim ICKIN, Farnaz MORADI, Erik SANDERS, Saurabh SINGH, Jalil TAGHIA, Konstantinos VANDIKAS
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Patent number: 11477868Abstract: The present disclosure relates to current control circuitry for controlling a current through a load. The current control circuitry comprises amplifier circuitry, reference voltage generator circuitry configured to supply a fixed reference voltage to a first input of the amplifier circuitry and an output stage comprising: a control terminal coupled to an output of the amplifier circuitry; a current input terminal configured to be coupled to the load; and a current output terminal. The current control circuitry further comprises a variable resistance coupled to the current output terminal of the output stage, and a feedback path between the current output terminal of the output stage and a second terminal of the amplifier circuitry for providing a feedback voltage to a second input of the amplifier circuitry.Type: GrantFiled: December 16, 2020Date of Patent: October 18, 2022Assignee: Cirrus Logic, Inc.Inventors: Dave Smith, Saurabh Singh, Andrew Buist, Paulius Cerebiejus, Mark J. McCloy-Stevens, Terence A. Orr