Patents by Inventor Sayaka Hirafune

Sayaka Hirafune has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100117220
    Abstract: A semiconductor package includes at least: a workpiece at least one surface of which is equipped with a device; a wall portion provided along an outer circumference of the device and is spaced apart from the device; and a cover member that is arranged above the device so as to form a first space and is supported by the workpiece via the wall portion, in which the first space includes at least one second space that communicates with an external space.
    Type: Application
    Filed: January 15, 2010
    Publication date: May 13, 2010
    Applicant: FUJIKURA LTD.
    Inventors: Sayaka HIRAFUNE, Tatsuo SUEMASU
  • Patent number: 7368321
    Abstract: A semiconductor package includes: a first substrate including: a semiconductor base material having a first side and a second side; a functional element that is provided at the first side of the semiconductor base material; a first wiring; a pad that is electrically connected to the functional element via the first wiring; a through-hole interconnection that is electrically connected to the pad and is provided in a hole that is defined penetrating the semiconductor base material from the first side thereof to the second side thereof, the through-hole interconnection including a first insulating film and a first conductive material formed on the first insulating film; and a sealing material provided surrounding the functional element; a second substrate that is bonded to a first side of the first substrate via the sealing material.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: May 6, 2008
    Assignee: Fujikura Ltd.
    Inventors: Michikazu Tomita, Tatsuo Suemasu, Sayaka Hirafune
  • Publication number: 20070264753
    Abstract: A semiconductor package includes: a first substrate including: a semiconductor base material having a first side and a second side; a functional element that is provided at the first side of the semiconductor base material; a first wiring; a pad that is electrically connected to the functional element via the first wiring; a through-hole interconnection that is electrically connected to the pad and is provided in a hole that is defined penetrating the semiconductor base material from the first side thereof to the second side thereof, the through-hole interconnection including a first insulating film and a first conductive material formed on the first insulating film; and a sealing material provided surrounding the functional element; a second substrate that is bonded to a first side of the first substrate via the sealing material.
    Type: Application
    Filed: July 26, 2007
    Publication date: November 15, 2007
    Applicant: FUJIKURA LTD.
    Inventors: Michikazu Tomita, Tatsuo Suemasu, Sayaka Hirafune
  • Patent number: 7274101
    Abstract: A semiconductor package includes: a first substrate including: a semiconductor base material having a first side and a second side; a functional element that is provided at the first side of the semiconductor base material; a first wiring; a pad that is electrically connected to the functional element via the first wiring; a through-hole interconnection that is electrically connected to the pad and is provided in a hole that is defined penetrating the semiconductor base material from the first side thereof to the second side thereof, the through-hole interconnection including a first insulating film and a first conductive material formed on the first insulating film; and a sealing material provided surrounding the functional element; a second substrate that is bonded to a first side of the first substrate via the sealing material.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: September 25, 2007
    Assignee: Fujikura Ltd.
    Inventors: Michikazu Tomita, Tatsuo Suemasu, Sayaka Hirafune
  • Patent number: 7180149
    Abstract: A semiconductor package of the invention comprises: a semiconductor element provided with a circuit element on one surface of a semiconductor substrate; an external wiring region provided on an other surface of the semiconductor substrate; a support substrate disposed on the one surface of the semiconductor substrate; an electrode pad disposed on the one surface of the semiconductor substrate; and a through-electrode which extends from the electrode pad through to the other surface of the semiconductor substrate.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: February 20, 2007
    Assignees: Fujikura Ltd., Olympus Corporation
    Inventors: Satoshi Yamamoto, Tatsuo Suemasu, Sayaka Hirafune, Toshihiko Isokawa, Koichi Shiotani, Kazuya Matsumoto
  • Publication number: 20060113057
    Abstract: A metal filling process is provided in which micro holes formed in a work piece are filled with metal by immersing the work piece in molten metal and then removing the work piece from the molten metal. As the work piece is dipped into molten metal, a bottom surface of the work piece is tilted to an angle of 0.5° or more relative to the surface of the molten metal, and as the work piece is removed from the molten metal, a top surface of the work piece is tilted to an angle of 0.5° or more and less than 85° relative to the surface of the molten metal. Failures such as a work piece fracturing when it is dipped into molten metal, or when it is removed from molten metal, are prevented, and failures such as metal remaining on a surface of a work piece after the work piece has been removed from molten metal are also prevented.
    Type: Application
    Filed: January 18, 2006
    Publication date: June 1, 2006
    Inventors: Sayaka Hirafune, Tatsuo Suemasu
  • Publication number: 20060001147
    Abstract: A semiconductor package includes: a first substrate including: a semiconductor base material having a first side and a second side; a functional element that is provided at the first side of the semiconductor base material; a first wiring; a pad that is electrically connected to the functional element via the first wiring; a through-hole interconnection that is electrically connected to the pad and is provided in a hole that is defined penetrating the semiconductor base material from the first side thereof to the second side thereof, the through-hole interconnection including a first insulating film and a first conductive material formed on the first insulating film; and a sealing material provided surrounding the functional element; a second substrate that is bonded to a first side of the first substrate via the sealing material.
    Type: Application
    Filed: June 27, 2005
    Publication date: January 5, 2006
    Inventors: Michikazu Tomita, Tatsuo Suemasu, Sayaka Hirafune
  • Publication number: 20050056903
    Abstract: A semiconductor package of the invention comprises: a semiconductor element provided with a circuit element on one surface of a semiconductor substrate; an external wiring region provided on an other surface of the semiconductor substrate; a support substrate disposed on the one surface of the semiconductor substrate; an electrode pad disposed on the one surface of the semiconductor substrate; and a through-electrode which extends from the electrode pad through to the other surface of the semiconductor substrate.
    Type: Application
    Filed: August 24, 2004
    Publication date: March 17, 2005
    Inventors: Satoshi Yamamoto, Tatsuo Suemasu, Sayaka Hirafune, Toshihiko Isokawa, Koichi Shiotani, Kazuya Matsumoto