Patents by Inventor Sayeh Khalili
Sayeh Khalili has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7705445Abstract: The semiconductor package includes two electrical contacts and a semiconductor device coupled to opposing sides of a substrate. The substrate defines at least one via extending at least partially there through. The semiconductor device includes a semiconductor low-speed interface electrically coupled to one of the electrical contacts through the via, and a semiconductor high-speed interface electrically coupled to flexible tape. The flexible tape is also electrically coupled to the other one of the electrical contacts.Type: GrantFiled: February 11, 2005Date of Patent: April 27, 2010Assignee: Rambus Inc.Inventors: Ming Li, Sayeh Khalili, Donald R. Mullen
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Publication number: 20080150123Abstract: The semiconductor package includes a rigid circuit board substrate having a substrate first side and an opposing substrate second side. The package also includes multiple electrical contacts coupled to the substrate at the substrate first side. An adhesive directly contacts the substrate second side. A semiconductor device directly contacts the adhesive. At least one flexible conductor is electrically connected to the semiconductor device and to at least one of the electrical contacts. The flexible conductor extends from the first side to the second side of the substrate.Type: ApplicationFiled: March 7, 2008Publication date: June 26, 2008Inventors: Ming Li, Sayeh Khalili, Donald R. Mullen
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Patent number: 7285443Abstract: The semiconductor module is provided that includes a semiconductor housing and a plurality of integrated circuit dice positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically coupled to the plurality of integrated circuit dice. The programmable memory device is programmable to identify the integrated circuit dice that meet a predetermined standard, such as an operating frequency requirement, or a core timing grade. Further, a method is provided for accessing a semiconductor module. The above mentioned housing is provided to enclose the plurality of integrated circuit dice and the programmable memory device. The integrated circuit dice of the plurality of integrated circuit dice that meet a predetermined standard are then identified. The programmable memory device is subsequently programmed to identify the selected integrated circuit dice.Type: GrantFiled: March 16, 2006Date of Patent: October 23, 2007Assignee: Rambus, Inc.Inventors: Thomas F. Fox, Sayeh Khalili, Belgacem Haba, David Nguyen, Richard Warmke, Xingchao Yuan
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Publication number: 20060180902Abstract: The semiconductor package includes two electrical contacts and a semiconductor device coupled to opposing sides of a substrate. The substrate defines at least one via extending at least partially there through. The semiconductor device includes a semiconductor low-speed interface electrically coupled to one of the electrical contacts through the via, and a semiconductor high-speed interface electrically coupled to flexible tape. The flexible tape is also electrically coupled to the other one of the electrical contacts.Type: ApplicationFiled: February 11, 2005Publication date: August 17, 2006Inventors: Ming Li, Sayeh Khalili, Donald Mullen
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Publication number: 20060160271Abstract: The semiconductor module is provided that includes a semiconductor housing and a plurality of integrated circuit dice positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically coupled to the plurality of integrated circuit dice. The programmable memory device is programmable to identify the integrated circuit dice that meet a predetermined standard, such as an operating frequency requirement, or a core timing grade. Further, a method is provided for accessing a semiconductor module. The above mentioned housing is provided to enclose the plurality of integrated circuit dice and the programmable memory device. The integrated circuit dice of the plurality of integrated circuit dice that meet a predetermined standard are then identified. The programmable memory device is subsequently programmed to identify the selected integrated circuit dice.Type: ApplicationFiled: March 16, 2006Publication date: July 20, 2006Inventors: Thomas Fox, Sayeh Khalili, Belgacem Haba, David Nguyen, Richard Warmke, Xingchao Yuan
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Patent number: 7037757Abstract: The semiconductor module is provided that includes a semiconductor housing and a plurality of integrated circuit dice positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically coupled to the plurality of integrated circuit dice. The programmable memory device is programmable to identify the integrated circuit dice that meet a predetermined standard, such as an operating frequency requirement, or a core timing grade. Further, a method is provided for accessing a semiconductor module. The above mentioned housing is provided to enclose the plurality of integrated circuit dice and the programmable memory device. The integrated circuit dice of the plurality of integrated circuit dice that meet a predetermined standard are then identified. The programmable memory device is subsequently programmed to identify the selected integrated circuit dice.Type: GrantFiled: February 20, 2004Date of Patent: May 2, 2006Assignee: Rambus Inc.Inventors: Thomas F. Fox, Sayeh Khalili, Belgacem Haba, David Nguyen, Richard Warmke, Xingchao Yuan
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Patent number: 6853557Abstract: A memory architecture includes a first substrate containing multiple memory devices and a first channel portion extending across the first substrate. The architecture further includes a second substrate containing multiple memory devices and a second channel portion extending across the second substrate. A connector couples the first channel portion to the second channel portion to form a single channel. The connector includes a first slot that receives an edge of the first substrate and a second slot that receives an edge of the second substrate. Another connector has a pair of slots that receive opposite edges of the first and second substrates. The channel portions extend across the substrates in a substantially linear path. Each channel portion includes multiple conductors having lengths that are approximately equal.Type: GrantFiled: September 20, 2000Date of Patent: February 8, 2005Assignee: Rambus, Inc.Inventors: Belgacem Haba, Sayeh Khalili, Donald R. Mullen, Nader Gamini
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Publication number: 20040164393Abstract: The semiconductor module is provided that includes a semiconductor housing and a plurality of integrated circuit dice positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically coupled to the plurality of integrated circuit dice. The programmable memory device is programmable to identify the integrated circuit dice that meet a predetermined standard, such as an operating frequency requirement, or a core timing grade. Further, a method is provided for accessing a semiconductor module. The above mentioned housing is provided to enclose the plurality of integrated circuit dice and the programmable memory device. The integrated circuit dice of the plurality of integrated circuit dice that meet a predetermined standard are then identified. The programmable memory device is subsequently programmed to identify the selected integrated circuit dice.Type: ApplicationFiled: February 20, 2004Publication date: August 26, 2004Applicant: Rambus, Inc.Inventors: Thomas F. Fox, Sayeh Khalili, Belgacem Haba, David Nguyen, Richard Warmke, Xingchao Yuan
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Patent number: 6720643Abstract: The semiconductor module is provided that includes a semiconductor housing and a plurality of integrated circuit dies positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically coupled to the plurality of integrated circuit dies. The programmable memory device is programmable to identify the integrated circuit dies that meet a predetermined standard, such as an operating frequency requirement, or a core timing grade. Further, a method is provided for accessing a semiconductor module. The above mentioned housing is provided to enclose the plurality of integrated circuit dies and the programmable memory device. The integrated circuit dies of the plurality of integrated circuit dies that meet a predetermined standard are then identified. The programmable memory device is subsequently programmed to identify the selected integrated circuit dies.Type: GrantFiled: February 22, 2001Date of Patent: April 13, 2004Assignee: Rambus, Inc.Inventors: Thomas F. Fox, Sayeh Khalili, Belgacem Haba, David Nguyen, Richard Warmke, Xingchao Yuan
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Patent number: 6657871Abstract: Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.Type: GrantFiled: June 20, 2002Date of Patent: December 2, 2003Assignee: Rambus Inc.Inventors: Donald V. Perino, Belgacem Haba, Sayeh Khalili
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Patent number: 6621155Abstract: A multi-chip device which includes a plurality of integrated circuit die disposed one over another. Each integrated circuit die includes one or a plurality of bond pads. One or a plurality of conductors are disposed to electrically couple the bond pads of vertically adjacent integrated circuit die. Each conductor is designed, calculated, specified and/or predetermined to have a length so as to behave as a segment in a multi-drop transmission line. The multi-drop transmission line may be terminated at one end or utilized in a flow-through approach. In one embodiment, an integrated circuit die may be horizontally offset with respect to a vertically adjacent integrated circuit die to expose the periphery region. In another embodiment, each integrated circuit die may be stacked and aligned in a vertical column. In this embodiment, a spacer such as a thermally conductive spacer is disposed between each integrated circuit die in the stack.Type: GrantFiled: December 23, 1999Date of Patent: September 16, 2003Assignee: Rambus Inc.Inventors: Donald V. Perino, Sayeh Khalili
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Patent number: 6545875Abstract: Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.Type: GrantFiled: May 10, 2000Date of Patent: April 8, 2003Assignee: Rambus, Inc.Inventors: Donald V. Perino, Belgacem Haba, Sayeh Khalili
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Patent number: 6514794Abstract: A semiconductor module having a first integrated circuit die having a planar surface. The first integrated circuit die has a first conductive pad disposed substantially on the planar surface and a redistributed conductive pad electrically connected to the first conductive pad. The redistributed conductive pad is disposed near a periphery of the planar surface. The semiconductor module has a second integrated circuit die stacked adjacent to the planar surface and offset from the periphery, such that a second conductive pad on the second integrated circuit die can be electrically connected to the redistributed conductive pad.Type: GrantFiled: February 5, 2002Date of Patent: February 4, 2003Assignee: Rambus Inc.Inventors: Belgacem Haba, Donald V. Perino, Sayeh Khalili
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Publication number: 20030007337Abstract: Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.Type: ApplicationFiled: June 20, 2002Publication date: January 9, 2003Applicant: Rambus Inc.Inventors: Donald V. Perino, Belgacem Haba, Sayeh Khalili
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Publication number: 20020127775Abstract: A semiconductor module having a first integrated circuit die having a planar surface. The first integrated circuit die has a first conductive pad disposed substantially on the planar surface and a redistributed conductive pad electrically connected to the first conductive pad. The redistributed conductive pad is disposed near a periphery of the planar surface. The semiconductor module has a second integrated circuit die stacked adjacent to the planar surface and offset from the periphery, such that a second conductive pad on the second integrated circuit die can be electrically connected to the redistributed conductive pad.Type: ApplicationFiled: February 5, 2002Publication date: September 12, 2002Applicant: Rambus Inc.Inventors: Belgacem Haba, Donald V. Perino, Sayeh Khalili
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Patent number: 6376904Abstract: A semiconductor module having a first integrated circuit die having a planar surface. The first integrated circuit die has a first conductive pad disposed substantially on the planar surface and a redistributed conductive pad electrically connected to the first conductive pad. The redistributed conductive pad is disposed near a periphery of the planar surface. The semiconductor module has a second integrated circuit die stacked adjacent to the planar surface and offset from the periphery, such that a second conductive pad on the second integrated circuit die can be electrically connected to the redistributed conductive pad.Type: GrantFiled: October 10, 2000Date of Patent: April 23, 2002Assignee: Rambus Inc.Inventors: Belgacem Haba, Donald V. Perino, Sayeh Khalili
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Patent number: RE43720Abstract: A multi-chip device which includes a plurality of integrated circuit die disposed one over another. Each integrated circuit die includes one or a plurality of bond pads. One or a plurality of conductors are disposed to electrically couple the bond pads of vertically adjacent integrated circuit die. Each conductor is designed, calculated, specified and/or predetermined to have a length so as to behave as a segment in a multi-drop transmission line. The multi-drop transmission line may be terminated at one end or utilized in a flow-through approach. In one embodiment, an integrated circuit die may be horizontally offset with respect to a vertically adjacent integrated circuit die to expose the periphery region. In another embodiment, each integrated circuit die may be stacked and aligned in a vertical column. In this embodiment, a spacer such as a thermally conductive spacer is disposed between each integrated circuit die in the stack.Type: GrantFiled: September 15, 2005Date of Patent: October 9, 2012Assignee: Rambus Inc.Inventors: Donald V. Perino, Sayeh Khalili
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Patent number: RE44019Abstract: The semiconductor module is provided that includes a semiconductor housing and a plurality of integrated circuit dice positioned within the housing. The semiconductor module also includes a programmable memory device positioned within the housing and electrically coupled to the plurality of integrated circuit dice. The programmable memory device is programmable to identify the integrated circuit dice that meet a predetermined standard, such as an operating frequency requirement, or a core timing grade. Further, a method is provided for accessing a semiconductor module. The above mentioned housing is provided to enclose the plurality of integrated circuit dice and the programmable memory device. The integrated circuit dice of the plurality of integrated circuit dice that meet a predetermined standard are then identified. The programmable memory device is subsequently programmed to identify the selected integrated circuit dice.Type: GrantFiled: October 23, 2009Date of Patent: February 19, 2013Assignee: Rambus Inc.Inventors: Thomas F. Fox, Sayeh Khalili, Belgacem Haba, David Nguyen, Richard Warmke, Xingchao Yuan