Patents by Inventor Sayyed Mahdi Kashmiri

Sayyed Mahdi Kashmiri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11914037
    Abstract: A light detection and ranging (Lidar) system includes a light transmission component driven by a phase-keyed burst pattern generator operable to apply a phase-coded key for activating the light source in a series of on/off pulses for the transmitted TX light. The on/off sequence is chosen such that the pattern's auto-correlation function has a maximized peak to side lobe ratio. The on/off pulses of the received RX light reflected from the object or scene is converted to a bitstream that is cross-correlated with the phase-coded key. A peak detector finds the peak of the cross-correlation function and generate a time-of-flight signal indicative of the time between the transmission of the TX light and the peak of the cross-correlation function.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: February 27, 2024
    Assignee: Robert Bosch GmbH
    Inventor: Sayyed Mahdi Kashmiri
  • Patent number: 11847560
    Abstract: A dynamic equilibrium (DEQ) model circuit includes a first multiplier configured to receive an input, scale the input by a first weight, and output the scaled input, second multiplier configured to receive a root, scale the root by a second weight, and output the scaled root, a summation block configured to combine the scaled input, a bias input, and the scaled root and output a non-linear input, and a first non-linear function configured to receive the non-linear input and output the root, wherein the first weight and second weight are based on a trained DEQ model of a neural network.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: December 19, 2023
    Assignee: Robert Bosch GmbH
    Inventors: Jeremy Kolter, Kenneth Wojciechowski, Efthymios Papageorgiou, Sayyed Mahdi Kashmiri
  • Patent number: 11550041
    Abstract: A circuit for filtering a signal corresponding to a time of flight (TOF) of light from a laser reflected off an object to a photo detector, the circuit includes a preamplifier, a DC cancelation loop, and an AC cancelation loop. The preamplifier may be configured to receive the signal from the photo detector corresponding to an output of the laser reflected off an object remote from the laser and photo detector. The DC cancelation loop includes a current feedback DC servo loop. The AC cancelation loop includes a feedback network driven by a floating class AB output stage, and the preamplifier configured to drive the floating class AB output stage, wherein the preamplifier is driven by an error signal of the feedback network and creates an AC signal path with the feedback network and floating class AB output stage.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: January 10, 2023
    Inventor: Sayyed Mahdi Kashmiri
  • Patent number: 11404106
    Abstract: A read-only memory (ROM) computing unit utilized in matrix operations of a neural network comprising a unit element including one or more connections, wherein a weight associated with the computing unit is responsive to either a connection or lack of connection internal to the unit cell or between the unit element and a wordline and a bitline utilized to form an array of rows and columns in the ROM computing unit, and one or more passive or active electrical elements located in the unit element, wherein the passive or active electrical elements are configured to adjust the weight associated with the compute unit, wherein the ROM computing unit is configured to receive an input and output a value associated with the matrix operation, wherein the value is responsive to the input and weight.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: August 2, 2022
    Inventors: Efthymios Papageorgiou, Kenneth Wojciechowski, Sayyed Mahdi Kashmiri
  • Patent number: 11387842
    Abstract: A system including a circuit, including a first preamplifier, a sampling switch, a regenerative latch, and a second preamplifier aligned in a pipelined sequence with the first preamplifier, wherein the first and second preamplifier are associated with dynamic comparator and configured to gain signal utilizing multiple cascaded gains and sample-and-hold stages including a plurality of phases.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: July 12, 2022
    Inventors: Sangwoo Lee, Sayyed Mahdi Kashmiri, Kenneth Wojciechowski
  • Publication number: 20220027130
    Abstract: A circuit configured to compute matrix multiply-and-add calculations that includes a digital-to-time converter configured to receive a digital input and output a signal proportional to the digital input and modulated in time-domain associated with a reference time, a memory including a crossbar network, wherein the memory is configured to receive the time modulated signal from the digital-to-time converter and output a weighted signal scaled in response to network weights of the crossbar network and the time modulated input signal, and an output interface in communication with the crossbar network and configured to receive its weighted output signal and output a digital value proportional to at least the reference time using a time-to-digital converter.
    Type: Application
    Filed: July 27, 2020
    Publication date: January 27, 2022
    Inventors: Sayyed Mahdi KASHMIRI, Kenneth WOJCIECHOWSKI, Jonas MESSNER, Efthymios PAPAGEORGIOU
  • Publication number: 20220028444
    Abstract: A read-only memory (ROM) computing unit utilized in matrix operations of a neural network comprising a unit element including one or more connections, wherein a weight associated with the computing unit is responsive to either a connection or lack of connection internal to the unit cell or between the unit element and a wordline and a bitline utilized to form an array of rows and columns in the ROM computing unit, and one or more passive or active electrical elements located in the unit element, wherein the passive or active electrical elements are configured to adjust the weight associated with the compute unit, wherein the ROM computing unit is configured to receive an input and output a value associated with the matrix operation, wherein the value is responsive to the input and weight.
    Type: Application
    Filed: July 27, 2020
    Publication date: January 27, 2022
    Inventors: Efthymios PAPAGEORGIOU, Kenneth WOJCIECHOWSKI, Sayyed Mahdi KASHMIRI
  • Publication number: 20220027723
    Abstract: A dynamic equilibrium (DEQ) model circuit includes a first multiplier configured to receive an input, scale the input by a first weight, and output the scaled input, second multiplier configured to receive a root, scale the root by a second weight, and output the scaled root, a summation block configured to combine the scaled input, a bias input, and the scaled root and output a non-linear input, and a first non-linear function configured to receive the non-linear input and output the root, wherein the first weight and second weight are based on a trained DEQ model of a neural network.
    Type: Application
    Filed: July 27, 2020
    Publication date: January 27, 2022
    Inventors: Jeremy KOLTER, Kenneth WOJCIECHOWSKI, Efthymios PAPAGEORGIOU, Sayyed Mahdi KASHMIRI
  • Publication number: 20210159895
    Abstract: A method of controlling a comparator includes during a first time period, enabling an auto-zero loop to provide an initial offset calibration of a differential preamplifier that includes differential memory capacitors; and during a second time period after the first window, enabling a self-calibrating circuit to provide an offset calibration of the differential preamplifier, and minimizing an output offset of a dynamic latch. Wherein the dynamic latch is configured to latch an output of the differential preamplifier at a sampling frequency, the auto-zero loop including an auxiliary amplifier configured to inject a correction signal into the differential preamplifier based on a voltage across the differential memory capacitors, and the self-calibrating circuit including a charge pump configured to adjust the voltage across the differential memory capacitors based on an output of the dynamic latch.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Inventors: Sayyed Mahdi KASHMIRI, Rainer BLECHSCHMIDT
  • Publication number: 20210156974
    Abstract: A circuit for filtering a signal corresponding to a time of flight (TOF) of light from a laser reflected off an object to a photo detector, the circuit includes a preamplifier, a DC cancelation loop, and an AC cancelation loop. The preamplifier may be configured to receive the signal from the photo detector corresponding to an output of the laser reflected off an object remote from the laser and photo detector. The DC cancelation loop includes a current feedback DC servo loop. The AC cancelation loop includes a feedback network driven by a floating class AB output stage, and the preamplifier configured to drive the floating class AB output stage, wherein the preamplifier is driven by an error signal of the feedback network and creates an AC signal path with the feedback network and floating class AB output stage.
    Type: Application
    Filed: November 27, 2019
    Publication date: May 27, 2021
    Inventor: Sayyed Mahdi KASHMIRI
  • Patent number: 11005469
    Abstract: A method of controlling a comparator includes during a first time period, enabling an auto-zero loop to provide an initial offset calibration of a differential preamplifier that includes differential memory capacitors; and during a second time period after the first window, enabling a self-calibrating circuit to provide an offset calibration of the differential preamplifier, and minimizing an output offset of a dynamic latch. Wherein the dynamic latch is configured to latch an output of the differential preamplifier at a sampling frequency, the auto-zero loop including an auxiliary amplifier configured to inject a correction signal into the differential preamplifier based on a voltage across the differential memory capacitors, and the self-calibrating circuit including a charge pump configured to adjust the voltage across the differential memory capacitors based on an output of the dynamic latch.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: May 11, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Sayyed Mahdi Kashmiri, Rainer Blechschmidt
  • Publication number: 20210072382
    Abstract: A light detection and ranging (Lidar) system includes a light transmission component driven by a phase-keyed burst pattern generator operable to apply a phase-coded key for activating the light source in a series of on/off pulses for the transmitted TX light. The on/off sequence is chosen such that the pattern's auto-correlation function has a maximized peak to side lobe ratio. The on/off pulses of the received RX light reflected from the object or scene is converted to a bitstream that is cross-correlated with the phase-coded key. A peak detector finds the peak of the cross-correlation function and generate a time-of-flight signal indicative of the time between the transmission of the TX light and the peak of the cross-correlation function.
    Type: Application
    Filed: January 29, 2019
    Publication date: March 11, 2021
    Inventor: Sayyed Mahdi Kashmiri
  • Patent number: 9714987
    Abstract: A fluxgate sensor including a magnetic-to-digital converter (MDC) can be adapted to measure an external magnetic field BEXT with a bandwidth fB. The MDC forward path can include: (a) converting an analog sense signal from the fluxgate sense coil to corresponding oversampled digital data using an oversampling data converter with an oversampling frequency fS greater than fB; and (b) loop filtering the oversampled digital data, synchronous with the oversampling frequency fS, to generate the loop output digital data. The MDC feedback path can include: (a) generating the feedback compensation current ICOMP from the loop output digital data, synchronous with a feedback path frequency fFB equal to ((M/N)×fS), where, M and N are integers; and (b) injecting the feedback compensation current ICOMP into the fluxgate compensation coil to induce the compensation field BCOMP, such that the induced compensation field BCOMP nulls the external field BEXT.
    Type: Grant
    Filed: March 21, 2014
    Date of Patent: July 25, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sayyed Mahdi Kashmiri, Willem J. Kindt
  • Publication number: 20140285189
    Abstract: A fluxgate sensor including a magnetic-to-digital converter (MDC) can be adapted to measure an external magnetic field BEXT with a bandwidth fB. The MDC forward path can include: (a) converting an analog sense signal from the fluxgate sense coil to corresponding oversampled digital data using an oversampling data converter with an oversampling frequency fS greater than fB; and (b) loop filtering the oversampled digital data, synchronous with the oversampling frequency fS, to generate the loop output digital data. The MDC feedback path can include: (a) generating the feedback compensation current ICOMP from the loop output digital data, synchronous with a feedback path frequency fFB equal to ((M/N)×fS), where, M and N are integers; and (b) injecting the feedback compensation current ICOMP into the fluxgate compensation coil to induce the compensation field BCOMP, such that the induced compensation field BCOMP nulls the external field BEXT.
    Type: Application
    Filed: March 21, 2014
    Publication date: September 25, 2014
    Inventors: Sayyed Mahdi Kashmiri, Willem J. Kindt
  • Patent number: 8222940
    Abstract: An electrothermal frequency-locked loop (EFLL) circuit is described. This EFLL circuit includes an oscillator in a feedback loop. A drive circuit in the EFLL circuit generates a first signal having a fundamental frequency, and an electrothermal filter (ETF) in the EFLL circuit provides a second signal based on the first signal. This second signal has the fundamental frequency and a phase (relative to the first signal) that corresponds to a temperature-dependent time constant of the ETF. Moreover, a sensing component in the EFLL circuit determines a parameter associated with a temperature of the ETF. For example, the parameter may be the temperature or may be other than the temperature, such as the fundamental frequency and/or the phase of the second signal.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: July 17, 2012
    Assignee: Stichting voor de Technische Wetenschappen
    Inventors: Sayyed Mahdi Kashmiri, Kofi A. A. Makinwa
  • Publication number: 20110187428
    Abstract: An electrothermal frequency-locked loop (EFLL) circuit is described. This EFLL circuit includes an oscillator in a feedback loop. A drive circuit in the EFLL circuit generates a first signal having a fundamental frequency, and an electrothermal filter (ETF) in the EFLL circuit provides a second signal based on the first signal. This second signal has the fundamental frequency and a phase (relative to the first signal) that corresponds to a temperature-dependent time constant of the ETF. Moreover, a sensing component in the EFLL circuit determines a parameter associated with a temperature of the ETF. For example, the parameter may be the temperature or may be other than the temperature, such as the fundamental frequency and/or the phase of the second signal.
    Type: Application
    Filed: January 26, 2011
    Publication date: August 4, 2011
    Inventors: Sayyed Mahdi Kashmiri, Kofi A. A. Makinwa