Abstract: The invention provides an apparatus, and related method, for providing a reconfigurable frame counter that can accommodate differing start of frame pulse locations in a synchronous communication system. The frame counter may be integrated with existing devices thus providing a cost effective advance in the functionality of existing communication devices. The reconfigurable frame counter includes a multiplexer, a byte processor and a frame counter. The multiplexer byte interleave multiplexes a plurality of lower data rate SONET signals to generate a higher data rate SONET signal of framed data bytes. The byte processor processes transport overhead bytes of the higher data rate SONET signal in accordance with a frame byte count value. The frame byte counter counts clock pulses that are each associated with the arrival of a framed data byte and generates a frame byte count value that corresponds to a frame byte location of the currently received framed data byte.

Abstract: The invention is directed to a technique for recalculating a bit interleave parity (BIP) byte for byte interleaved SONET/SDH frames. An interleaved SONET/SDH frame consists of a plurality (N) of base STS-1 frames that are byte interleave multiplexed. Each STS-1 frame contains transport overhead bytes, including a BIP byte (B2) and a remote error indication byte (M1). The M1 byte is associated with error over an entire interleaved STS-N frame and not a particular individual STS-1 frame. Each B2 byte is associated with a particular STS-1 frame and is calculated over selected overhead bytes, including the M1 byte, and all of the payload bytes of the previous STS-1 frame. When SONET frames are multiplexed, the M1 byte values are changed and the B2 parity calculations for each STS-1 frame must be updated. Existing systems generally update the affected B2 bytes by performing the B2 parity calculation over all of the respective overhead bytes and payload bytes for each frame.