Patents by Inventor Scott A. Weber

Scott A. Weber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11983906
    Abstract: Systems and methods for predicting a target set of pixels are disclosed. In one embodiment, a method may include obtaining target content. The target content may include a target set of pixels to be predicted. The method may also include convolving the target set of pixels to generate an estimated set of pixels. The method may include matching a second set of pixels in the target content to the target set of pixels. The second set of pixels may be within a distance from the target set of pixels. The method may include refining the estimated set of pixels to generate a refined set of pixels using a second set of pixels in the target content.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: May 14, 2024
    Assignee: Disney Enterprises, Inc.
    Inventors: Christopher Schroers, Erika Doggett, Stephan Mandt, Jared Mcphillen, Scott Labrozzi, Romann Weber, Mauro Bamert
  • Publication number: 20240145395
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises, a package substrate, an interposer on the package substrate, a first die cube and a second die cube on the interposer, wherein the interposer includes conductive traces for electrically coupling the first die cube to the second die cube, a die on the package substrate, and an embedded multi-die interconnect bridge (EMIB) in the package substrate, wherein the EMIB electrically couples the interposer to the die.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: MD Altaf HOSSAIN, Ankireddy NALAMALPU, Dheeraj SUBBAREDDY, Robert SANKMAN, Ravindranath V. MAHAJAN, Debendra MALLIK, Ram S. VISWANATH, Sandeep B. SANE, Sriram SRINIVASAN, Rajat AGARWAL, Aravind DASU, Scott WEBER, Ravi GUTALA
  • Publication number: 20240139658
    Abstract: Embodiments are directed to filtration container assemblies and methods of using the same. A filtration container assembly can include an outer container and a plunging assembly. The outer container can have a first open end and a second closed end that defines an inner cavity. The plunging assembly can include a first end and a second end, with the second end of the plunging assembly being configured to be received within the inner cavity of the outer container. The plunging assembly can also include an inner sleeve having a first end and a second end and an outer wall that defines an inner bore. The plunging assembly can further include a filtration assembly in fluid communication with the inner bore, with the filtration assembly including a flow control device.
    Type: Application
    Filed: October 23, 2023
    Publication date: May 2, 2024
    Inventors: Travis Merrigan, Patrick Crosby, Scott Rolfson, Andrew Weber, Christopher Leiter
  • Publication number: 20240131392
    Abstract: An exercise and/or therapeutic machine includes a controller. The controller is configured to: receive at least one input indicating a number of users of the exercise and/or therapeutic machine for a multi-user routine and a number of segments of the multi-user routine, each segment of the number of segments having an interval specific to each user of the number of users; receive at least one completion designation associated with at least one interval, wherein the at least one completion designation indicates a completion of the at least one interval; transition between each interval of each segment based on detecting the at least one completion designation associated with the at least one interval so that each user of the number of users participates in the multi-user routine on the same exercise and/or therapeutic machine; and generate and provide a display regarding a summary of the multi-user routine.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Applicant: Woodway USA, Inc.
    Inventors: Douglas G. Bayerlein, Eric Weber, Vance E. Emons, Jacob Hilsabeck, Scott D. Hoerig
  • Publication number: 20240110899
    Abstract: A method for determining the amount of chromogranin A (CgA) in a sample includes: (a) purifying CgA in the sample; (b) adding an internal standard; (c) ionizing CgA and the internal standard to produce one or more CgA ion(s) and one or more internal standard ion(s) detectable by mass spectrometry; (d) determining the amount of the ion(s) from step (c) by mass spectrometry; and (e) correlating the amount of CgA in the sample to the amount of ion(s) measured in step (d).
    Type: Application
    Filed: December 12, 2023
    Publication date: April 4, 2024
    Applicant: Quest Diagnostics Investments LLC
    Inventors: Darren Weber, Michael P. Caufield, Michael McPhaul, Scott Goldman, Nigel Clarke
  • Publication number: 20240084115
    Abstract: Compounded virgin low density polyethylene (virgin LDPE) and post-consumer recyclate low density polyethylene, linear low density polyethylene or a combination of low and linear low density polyethylene compositions with improved processability and mechanical properties, including processes of making, products and application in food and non-food packaging are described herein.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 14, 2024
    Applicant: EQUISTAR CHEMICALS, LP
    Inventor: ROBERT SCOTT WEBER
  • Patent number: 11921575
    Abstract: A VIN verification system allow an accurate detection of incorrectly entered VIN in an electronic file followed by correction of the incorrectly entered VIN. A server of the VIN verification system verify characters and letters of the VIN in the electronic file to detect data entry and/or transmission errors. The server upon determining that the characters and entered in the VIN are incorrect will then replace the characters and letters with alternate or substitute characters and letters and generate a new VIN in the electronic file. The server will reexamine the new VIN to validate the new VIN, and then transmit the electronic file to another web application for further processing.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: March 5, 2024
    Assignee: United Services Automobile Association (USAA)
    Inventors: Michael Shoemaker, Scott Weber
  • Publication number: 20240062141
    Abstract: A method and system to estimate lead time for delivery of a good is disclosed. In aspects, the method performs steps of: receiving a user request to transport the good; identifying a plurality of drivers for transporting the good within a virtual area; determining an expected response time to receive an acceptance of a job corresponding to the user request from a driver in the plurality of drivers; estimating an expected lead time using the expected response time and an expected travel time; and transmitting the expected lead time to the user.
    Type: Application
    Filed: August 16, 2022
    Publication date: February 22, 2024
    Applicant: Airspace Technologies, Inc.
    Inventors: Spence Lunderman, Ksenia Palke, Michael Scott Weber
  • Patent number: 11909096
    Abstract: An adjustable antenna positioning system feed is disclosed herein. The adjustable antenna positioning system feed includes a feed base, a splash plate assembly, and a feed insert. The feed base is configured to be coupled to a reflector. The splash plate assembly is configured to be removably coupled to the feed base. The adjustable antenna positioning system feed is in a primary arrangement when directly coupled. The feed insert is positioned between the feed base and the splash plate. The adjustable antenna positioning system feed is in a secondary arrangement when the feed insert is coupled with the feed base and the splash plate.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: February 20, 2024
    Assignee: Antenna Research Associates, Inc.
    Inventors: Keith Ayotte, Sandeep Palreddy, Scott Weber, Tyler McSorley, Nicholas Keith
  • Patent number: 11901299
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises, a package substrate, an interposer on the package substrate, a first die cube and a second die cube on the interposer, wherein the interposer includes conductive traces for electrically coupling the first die cube to the second die cube, a die on the package substrate, and an embedded multi-die interconnect bridge (EMIB) in the package substrate, wherein the EMIB electrically couples the interposer to the die.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: February 13, 2024
    Assignee: Intel Corporation
    Inventors: Md Altaf Hossain, Ankireddy Nalamalpu, Dheeraj Subbareddy, Robert Sankman, Ravindranath V. Mahajan, Debendra Mallik, Ram S. Viswanath, Sandeep B. Sane, Sriram Srinivasan, Rajat Agarwal, Aravind Dasu, Scott Weber, Ravi Gutala
  • Publication number: 20240045717
    Abstract: Methods and systems for processing requests with load-dependent throttling. The system compares a count of active job requests being currently processed for a user associated with a new job request with an active job cap number for that user. When the count of active job requests being currently processed for that user does not exceed the active job cap number specific to that user, the job request is added to an active job queue for processing. However, when the count of active job requests being currently processed for that user exceeds the active job cap number, the job request is placed on a throttled queue to await later processing when an updated count of active job requests being currently processed for that user is below the active job cap number. Once the count is below the cap, the throttle request is moved to the active job queue for processing.
    Type: Application
    Filed: October 13, 2023
    Publication date: February 8, 2024
    Applicant: Shopify Inc.
    Inventors: Robert MIC, Aline Fatima MANERA, Timothy WILLARD, Nicole SIMONE, Scott WEBER
  • Patent number: 11895201
    Abstract: A multitenancy system that includes a host provider, a programmable device, and multiple tenants is provided. The host provider may publish a multitenancy mode sharing and allocation policy that includes a list of terms to which the programmable device and tenants can adhere. The programmable device may include a secure device manager configured to operate in a multitenancy mode to load a tenant persona into a given partial reconfiguration (PR) sandbox region on the programmable device. The secure device manager may be used to enforce spatial isolation between different PR sandbox regions and temporal isolation between successive tenants in one PR sandbox region.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: February 6, 2024
    Assignee: Intel Corporation
    Inventors: Steffen Schulz, Patrick Koeberl, Alpa Narendra Trivedi, Scott Weber
  • Patent number: 11822959
    Abstract: Methods and systems for processing requests with load-dependent throttling. The system compares a count of active job requests being currently processed for a user associated with a new job request with an active job cap number for that user. When the count of active job requests being currently processed for that user does not exceed the active job cap number specific to that user, the job request is added to an active job queue for processing. However, when the count of active job requests being currently processed for that user exceeds the active job cap number, the job request is placed on a throttled queue to await later processing when an updated count of active job requests being currently processed for that user is below the active job cap number. Once the count is below the cap, the throttle request is moved to the active job queue for processing.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: November 21, 2023
    Assignee: Shopify Inc.
    Inventors: Robert Mic, Aline Fatima Manera, Timothy Willard, Nicole Simone, Scott Weber
  • Patent number: 11789641
    Abstract: A three dimensional circuit system includes a first integrated circuit die having a core logic region that has first memory circuits and logic circuits. The three dimensional circuit system includes a second integrated circuit die that has second memory circuits. The first and second integrated circuit dies are coupled together in a vertically stacked configuration. The three dimensional circuit system includes third memory circuits coupled to the first integrated circuit die. The third memory circuits reside in a plane of the first integrated circuit die. The logic circuits are coupled to access the first, second, and third memory circuits and data can move between the first, second, and third memories. The third memory circuits have a larger memory capacity and a smaller memory access bandwidth than the second memory circuits. The second memory circuits have a larger memory capacity and a smaller memory access bandwidth than the first memory circuits.
    Type: Grant
    Filed: June 16, 2021
    Date of Patent: October 17, 2023
    Assignee: Intel Corporation
    Inventors: Scott Weber, Jawad Khan, Ilya Ganusov, Martin Langhammer, Matthew Adiletta, Terence Magee, Albert Fazio, Richard Coulson, Ravi Gutala, Aravind Dasu, Mahesh Iyer
  • Publication number: 20230297727
    Abstract: An apparatus to facilitate enabling secure state-clean during configuration of partial reconfiguration bitstreams on accelerator devices is disclosed. The apparatus includes a security engine to perform, as part of a PR configuration sequence for a new partial reconfiguration (PR) persona corresponding to a PR bitstream, a first clear operation to clear previously-set persona configuration bits in the region; perform, as part of the PR configuration sequence subsequent to the first clear operation, a set operation to set new persona configuration bits in the region; and perform, as part of the PR configuration sequence, a second clear operation to clear memory blocks of the region that became unfrozen subsequent to the set operation.
    Type: Application
    Filed: April 14, 2023
    Publication date: September 21, 2023
    Applicant: Intel Corporation
    Inventors: Alpa Trivedi, Scott Weber, Steffen Schulz, Patrick Koeberl
  • Publication number: 20230266995
    Abstract: Methods and systems for processing requests with load-dependent throttling. The system compares a count of active job requests being currently processed for a user associated with a new job request with an active job cap number for that user. When the count of active job requests being currently processed for that user does not exceed the active job cap number specific to that user, the job request is added to an active job queue for processing. However, when the count of active job requests being currently processed for that user exceeds the active job cap number, the job request is placed on a throttled queue to await later processing when an updated count of active job requests being currently processed for that user is below the active job cap number. Once the count is below the cap, the throttle request is moved to the active job queue for processing.
    Type: Application
    Filed: February 18, 2022
    Publication date: August 24, 2023
    Applicant: Shopify Inc.
    Inventors: Robert MIC, Aline Fatima Manera, Timothy Willard, Nicole Simone, Scott Weber
  • Patent number: 11651111
    Abstract: An apparatus to facilitate enabling secure state-clean during configuration of partial reconfiguration bitstreams on accelerator devices is disclosed. The apparatus includes a security engine to receive an incoming partial reconfiguration (PR) bitstream corresponding to a new PR persona to configure a region of the apparatus; perform, as part of a PR configuration sequence for the new PR persona, a first clear operation to clear previously-set persona configuration bits in the region; perform, as part of the PR configuration sequence subsequent to the first clear operation, a set operation to set new persona configuration bits in the region; and perform, as part of the PR configuration sequence, a second clear operation to clear memory blocks of the region that became unfrozen subsequent to the set operation, the second clear operation performed using a persona-dependent mask corresponding to the new PR persona.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: May 16, 2023
    Assignee: INTEL CORPORATION
    Inventors: Alpa Trivedi, Scott Weber, Steffen Schulz, Patrick Koeberl
  • Publication number: 20230131938
    Abstract: An integrated circuit includes a buffer circuit, a memory circuit, and a controller circuit that determines if the memory circuit stores information that is valid and determines whether to transmit the information stored in the memory circuit to the buffer circuit based on credits that indicate an amount of storage space available in the buffer circuit. The controller circuit transmits the information to the buffer circuit if the credits indicate that sufficient storage space is available in the buffer circuit to store the information.
    Type: Application
    Filed: December 21, 2022
    Publication date: April 27, 2023
    Applicant: Intel Corporation
    Inventors: Scott Weber, Chang Kian Tan, Rajiv Kumar, Saravanan Sethuraman
  • Publication number: 20230107106
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises, a package substrate, an interposer on the package substrate, a first die cube and a second die cube on the interposer, wherein the interposer includes conductive traces for electrically coupling the first die cube to the second die cube, a die on the package substrate, and an embedded multi-die interconnect bridge (EMIB) in the package substrate, wherein the EMIB electrically couples the interposer to the die.
    Type: Application
    Filed: December 12, 2022
    Publication date: April 6, 2023
    Inventors: MD Altaf HOSSAIN, Ankireddy NALAMALPU, Dheeraj SUBBAREDDY, Robert SANKMAN, Ravindranath V. MAHAJAN, Debendra MALLIK, Ram S. VISWANATH, Sandeep B. SANE, Sriram SRINIVASAN, Rajat AGARWAL, Aravind DASU, Scott WEBER, Ravi GUTALA
  • Publication number: 20230089869
    Abstract: An apparatus to facilitate scalable runtime validation for on-device design rule checks is disclosed. The apparatus includes a memory to store a contention set, multiplexers, and a validator. In one implementation, the validator is to: receive design rule information for the multiplexers, the design rule information referencing the contention set, wherein the contention set identifies a determined harmful bitstream configuration for each multiplexer instance of the multiplexers, and wherein the contention set comprises a mapping of contents of a user bitstream to configuration bits of the multiplexers; receive, at the validator of the apparatus, the user bitstream for programming the multiplexers of the apparatus; analyze, at the validator using the design rule information, the user bitstream against the contention set at a programming time of the apparatus; and provide an error indication responsive to identifying a match between the user bitstream and the contention set.
    Type: Application
    Filed: November 29, 2022
    Publication date: March 23, 2023
    Applicant: Intel Corporation
    Inventors: Furkan Turan, Patrick Koeberl, Alpa Trivedi, Steffen Schulz, Scott Weber