Patents by Inventor Scott Andrew PARISH

Scott Andrew PARISH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160049236
    Abstract: An embedded magnetic component device includes a magnetic core located in a cavity in an insulating substrate. An electrical winding includes inner and outer conductive connectors. An inner solid bonded joint boundary is located between first and second portions of the insulating substrate and extends between the cavity and the inner conductive connectors. An outer solid bonded joint boundary is located between the first and the second portions of the insulating substrate extends between the cavity and the outer conductive connectors. The minimum distance of the inner solid bonded joint boundary between any of the inner conductive connectors and the inner interior wall of the cavity is defined as D1, and the minimum distance of the outer solid bonded joint boundary between any of the outer conductive connectors and the outer interior wall of the cavity is defined as D2. D1 and D2 are about 0.4 mm or more.
    Type: Application
    Filed: August 13, 2015
    Publication date: February 18, 2016
    Inventors: Quinn Robert KNELLER, Scott Andrew PARISH, Justin MORGAN
  • Publication number: 20160049235
    Abstract: An embedded magnetic component device includes a magnetic core located in a cavity extending into an insulating substrate. The cavity and magnetic core are coved with a cover layer. Through holes extend through the cover layer and the insulating substrate, and are plated to define conductive vias. Metallic traces are provided at exterior surfaces of the cover layer and the insulating substrate to define upper and lower winding layers. The metallic traces and conductive vias define the respective primary and secondary side windings for an embedded transformer. At least a first isolation barrier is provided on the cover layer, and at least a third insulating layer is provided on the substrate. The second and third insulating layers provide additional insulation for the device, and define and function as a circuit board for surface mounted power electronics.
    Type: Application
    Filed: August 13, 2015
    Publication date: February 18, 2016
    Inventors: Scott Andrew PARISH, Lee FRANCIS