Patents by Inventor Scott Bohannon

Scott Bohannon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10831323
    Abstract: An input device includes a plurality of sensor electrodes and a processing system that is operable in at least a first mode or a second mode. The processing system is configured to receive an input current from a pair of the sensor electrodes. When operating the first mode, the processing system is configured to measure a capacitance across the pair of sensor electrodes based on the received input current. When operating the second mode, the processing system is configured to measure a resistance between the pair of sensor electrodes based on the received input current.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: November 10, 2020
    Assignee: Synaptics Incorporated
    Inventors: Eric Scott Bohannon, Steve Chikin Lo, Petr Shepelev
  • Patent number: 10768762
    Abstract: A method and related processing system and input device are disclosed, the method comprising driving a first capacitive sensing signal with first sensing frequency onto a first group of a plurality of sensor electrodes, and acquiring first capacitive measurements of resulting signals received by a second group of the plurality of sensor electrodes. Acquiring first capacitive measurements comprises applying a first demodulation signal with a predefined first mixing period defined within a sensing period associated with the first sensing frequency. The method further comprises driving a second capacitive sensing signal having a second sensing frequency different than the first sensing frequency onto a third group of the plurality of sensor electrodes, and acquiring second capacitive measurements of resulting signals received by a fourth group of the plurality of sensor electrodes.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: September 8, 2020
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Eric Scott Bohannon, Marshall J. Bell, Jr.
  • Patent number: 10725583
    Abstract: A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: July 28, 2020
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Eric Scott Bohannon, Marshall J. Bell, Jr., Yihong Yang
  • Patent number: 10635236
    Abstract: Methods and associated processing systems are disclosed for acquiring gain mismatch values and offset mismatch values corresponding to a plurality of analog-to-digital converters (ADCs). One method comprises coupling receiver circuitry of a processing system with a capacitive sensor comprising a plurality of sensor electrodes, the receiver circuitry comprising a plurality of ADCs, each ADC of the plurality of ADCs coupled with one or more respective sensor electrodes of the plurality of sensor electrodes. The method further comprises, while at least a portion of transmitter circuitry of the processing system is disabled, acquiring measurements using each ADC of the plurality of ADCs; and storing, using the acquired measurements, a plurality of offset mismatch values in a memory of the processing system. The processing system is operable to apply the plurality of offset mismatch values to capacitive measurements acquired using the plurality of ADCs.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: April 28, 2020
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Eric Scott Bohannon, Steve Chikin Lo, Keung Kwok Kwan
  • Publication number: 20190361545
    Abstract: A method and related processing system and input device are disclosed, the method comprising driving a first capacitive sensing signal with first sensing frequency onto a first group of a plurality of sensor electrodes, and acquiring first capacitive measurements of resulting signals received by a second group of the plurality of sensor electrodes. Acquiring first capacitive measurements comprises applying a first demodulation signal with a predefined first mixing period defined within a sensing period associated with the first sensing frequency. The method further comprises driving a second capacitive sensing signal having a second sensing frequency different than the first sensing frequency onto a third group of the plurality of sensor electrodes, and acquiring second capacitive measurements of resulting signals received by a fourth group of the plurality of sensor electrodes.
    Type: Application
    Filed: August 6, 2019
    Publication date: November 28, 2019
    Inventors: Eric Scott BOHANNON, Marshall J. BELL, JR.
  • Patent number: 10382054
    Abstract: An analog front end (AFE) for an input device includes a current conveyor and an analog-to-digital converter (ADC) switchably coupled to the current conveyor. The current conveyor is configured to receive an input signal from a plurality of sensor electrodes. The ADC generates an output value corresponding to a digital representation of the input signal when the ADC is coupled to the current conveyor. Further, the ADC may selectively adjust the output value based at least in part on a state of the ADC when the ADC is decoupled from the current conveyor. In some implementations, the ADC may include a delta-sigma modulator configured to generate an additional sample when the ADC is decoupled from the current conveyor. The ADC may determine an amount of quantization error in the output value based on the additional sample, and adjust the output value when the quantization error exceeds a threshold amount.
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: August 13, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventor: Eric Scott Bohannon
  • Patent number: 10372276
    Abstract: A method and related processing system and input device are disclosed, the method comprising driving a first capacitive sensing signal with first sensing frequency onto a first group of a plurality of sensor electrodes, and acquiring first capacitive measurements of resulting signals received by a second group of the plurality of sensor electrodes. Acquiring first capacitive measurements comprises applying a first demodulation signal with a predefined first mixing period defined within a sensing period associated with the first sensing frequency. The method further comprises driving a second capacitive sensing signal having a second sensing frequency different than the first sensing frequency onto a third group of the plurality of sensor electrodes, and acquiring second capacitive measurements of resulting signals received by a fourth group of the plurality of sensor electrodes.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: August 6, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Eric Scott Bohannon, Marshall J. Bell, Jr.
  • Publication number: 20190149163
    Abstract: An analog front end (AFE) for an input device includes a current conveyor and an analog-to-digital converter (ADC) switchably coupled to the current conveyor. The current conveyor is configured to receive an input signal from a plurality of sensor electrodes. The ADC generates an output value corresponding to a digital representation of the input signal when the ADC is coupled to the current conveyor. Further, the ADC may selectively adjust the output value based at least in part on a state of the ADC when the ADC is decoupled from the current conveyor. In some implementations, the ADC may include a delta-sigma modulator configured to generate an additional sample when the ADC is decoupled from the current conveyor. The ADC may determine an amount of quantization error in the output value based on the additional sample, and adjust the output value when the quantization error exceeds a threshold amount.
    Type: Application
    Filed: November 10, 2017
    Publication date: May 16, 2019
    Inventor: Eric Scott Bohannon
  • Publication number: 20190095002
    Abstract: An input device includes a plurality of sensor electrodes and a processing system that is operable in at least a first mode or a second mode. The processing system is configured to receive an input current from a pair of the sensor electrodes. When operating the first mode, the processing system is configured to measure a capacitance across the pair of sensor electrodes based on the received input current. When operating the second mode, the processing system is configured to measure a resistance between the pair of sensor electrodes based on the received input current.
    Type: Application
    Filed: July 16, 2018
    Publication date: March 28, 2019
    Inventors: Eric Scott BOHANNON, Steve Chikin LO, Petr SHEPELEV
  • Patent number: 10228797
    Abstract: Embodiments described herein include an input device with a plurality of capacitive sensor electrodes configured to receive a signal. The input device also includes a processing system coupled to the plurality of capacitive sensor electrodes. The processing system includes an analog front end (AFE). The AFE includes an anti-aliasing filter comprising a continuous time analog infinite impulse response (IIR) filter configured to filter out interference from the received signal at frequencies higher than a signal frequency of the processing system to produce an anti-aliased signal. The AFE also includes a charge integrator configured to integrate the anti-aliased signal.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: March 12, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Jeremy Roberson, David Sobel, Farzaneh Shahrokhi, Adam Schwartz, Eric Scott Bohannon
  • Publication number: 20190034027
    Abstract: Methods and associated processing systems are disclosed for acquiring gain mismatch values and offset mismatch values corresponding to a plurality of analog-to-digital converters (ADCs). One method comprises coupling receiver circuitry of a processing system with a capacitive sensor comprising a plurality of sensor electrodes, the receiver circuitry comprising a plurality of ADCs, each ADC of the plurality of ADCs coupled with one or more respective sensor electrodes of the plurality of sensor electrodes. The method further comprises, while at least a portion of transmitter circuitry of the processing system is disabled, acquiring measurements using each ADC of the plurality of ADCs; and storing, using the acquired measurements, a plurality of offset mismatch values in a memory of the processing system. The processing system is operable to apply the plurality of offset mismatch values to capacitive measurements acquired using the plurality of ADCs.
    Type: Application
    Filed: July 26, 2017
    Publication date: January 31, 2019
    Inventors: Eric Scott BOHANNON, Steve Chikin LO, Keung Kwok KWAN
  • Publication number: 20180356914
    Abstract: A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Inventors: Eric Scott BOHANNON, Marshall J. BELL, JR., Yihong YANG
  • Patent number: 10133435
    Abstract: A method and related processing system and input device are disclosed, the method comprising driving a first capacitive sensing signal having a predefined first sensing frequency onto a first group of a plurality of sensor electrodes, and acquiring first capacitive measurements of resulting signals received by a second group of the plurality of sensor electrodes. Acquiring first capacitive measurements comprises applying a first demodulation signal having a predefined mixing period defined within a sensing period associated with the first sensing frequency. The method further comprises operating, based on the first demodulation signal, one or more switching elements coupled with one or more sensor electrodes of the first group or the second group, wherein the one or more switching elements are in a conducting state during the mixing period.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: November 20, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventor: Eric Scott Bohannon
  • Patent number: 10126900
    Abstract: A method and related input device and processing system and are disclosed, the method comprising acquiring first capacitive measurements of first resulting signals responsive to driving a first sensing signal, wherein acquiring first capacitive measurements comprises receiving a predefined number of current pulses within a first burst period. The method further comprises acquiring second capacitive measurements of second resulting signals responsive to driving a second sensing signal having a greater sensing frequency. Acquiring the second capacitive measurements comprises inserting, based at least on the sensing frequency of the second sensing signal, one or more null time periods within the second burst period such that the same number of current pulses is received during the second burst period.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: November 13, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventor: Eric Scott Bohannon
  • Publication number: 20180284917
    Abstract: A method and related input device and processing system and are disclosed, the method comprising acquiring first capacitive measurements of first resulting signals responsive to driving a first sensing signal, wherein acquiring first capacitive measurements comprises receiving a predefined number of current pulses within a first burst period. The method further comprises acquiring second capacitive measurements of second resulting signals responsive to driving a second sensing signal having a greater sensing frequency. Acquiring the second capacitive measurements comprises inserting, based at least on the sensing frequency of the second sensing signal, one or more null time periods within the second burst period such that the same number of current pulses is received during the second burst period.
    Type: Application
    Filed: April 4, 2017
    Publication date: October 4, 2018
    Inventor: Eric Scott BOHANNON
  • Patent number: 10061415
    Abstract: A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: August 28, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Eric Scott Bohannon, Marshall J. Bell, Jr., Yihong Yang
  • Publication number: 20180196542
    Abstract: A method and related processing system and input device are disclosed, the method comprising driving a first capacitive sensing signal with first sensing frequency onto a first group of a plurality of sensor electrodes, and acquiring first capacitive measurements of resulting signals received by a second group of the plurality of sensor electrodes. Acquiring first capacitive measurements comprises applying a first demodulation signal with a predefined first mixing period defined within a sensing period associated with the first sensing frequency. The method further comprises driving a second capacitive sensing signal having a second sensing frequency different than the first sensing frequency onto a third group of the plurality of sensor electrodes, and acquiring second capacitive measurements of resulting signals received by a fourth group of the plurality of sensor electrodes.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 12, 2018
    Inventors: Eric Scott BOHANNON, Marshall J. BELL, JR.
  • Publication number: 20180188845
    Abstract: A method and related processing system and input device are disclosed, the method comprising driving a first capacitive sensing signal having a predefined first sensing frequency onto a first group of a plurality of sensor electrodes, and acquiring first capacitive measurements of resulting signals received by a second group of the plurality of sensor electrodes. Acquiring first capacitive measurements comprises applying a first demodulation signal having a predefined mixing period defined within a sensing period associated with the first sensing frequency. The method further comprises operating, based on the first demodulation signal, one or more switching elements coupled with one or more sensor electrodes of the first group or the second group, wherein the one or more switching elements are in a conducting state during the mixing period.
    Type: Application
    Filed: January 3, 2017
    Publication date: July 5, 2018
    Inventor: Eric Scott BOHANNON
  • Patent number: 9971463
    Abstract: This disclosure generally provides an input device that includes a matrix sensor that includes a plurality of sensor electrodes arranged in rows on a common surface or plane. The input device may include a plurality of sensor modules coupled to the sensor electrodes that measure capacitive sensing signals corresponding to the electrodes. Instead of measuring sensor electrodes that are in the same column, the embodiments herein simultaneously measure capacitive sensing signals on at least two sensor electrodes that are in the same row. In one example, the sensor electrodes in the row being measured are spaced the same distance from a side of a substrate coupling the electrodes to the sensor modules and may have approximately the same electrical time constant.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: May 15, 2018
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Petr Shepelev, Eric Scott Bohannon, Kasra Khazeni
  • Publication number: 20180004317
    Abstract: A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.
    Type: Application
    Filed: June 30, 2016
    Publication date: January 4, 2018
    Inventors: Eric Scott BOHANNON, Marshall J. BELL, JR., Yihong YANG