Abstract: A halo implant (42, 44) for an MOS transistor (10) is formed in a semiconductor substrate (12) at a shallow implant angle, relative to normal to the substrate surface (29). A polysilicon gate structure (32, 33) is formed over a gate oxide (28) and then a hard mask (70), such as a TEOS-generated layer of silicon oxide, is deposited on an upper surface (68) of the gate. The mask is etched with a blanket anisotropic etch to form a cap-shaped mask (72). The shape of the cap causes the dopant for the halo implant to penetrate to a depth which follows the contour of the cap. Thus, halo implants may be formed which extend under the gate structure without the need for large angle implants and resultant shadowing problems caused by adjacent devices.

Abstract: A halo implant (42, 44) for an MOS transistor (10) is formed in a semiconductor substrate (12) at a shallow implant angle, relative to normal to the substrate surface (29). A polysilicon gate structure (32, 33) is formed over a gate oxide (28) and then a hard mask (70), such as a TEOS-generated layer of silicon oxide, is deposited on an upper surface (68) of the gate. The mask is etched with a blanket anisotropic etch to form a cap-shaped mask (72). The shape of the cap causes the dopant for the halo implant to penetrate to a depth which follows the contour of the cap. Thus, halo implants may be formed which extend under the gate structure without the need for large angle implants and resultant shadowing problems caused by adjacent devices.

Abstract: A method for making an integrated circuit preferably includes the steps of: forming a trench laterally adjacent an active region in a semiconductor substrate; forming a dielectric layer on the semiconductor substrate filling the trench and covering the active area; selectively etching the dielectric layer to remove at least a portion of the dielectric layer overlying the active region and to define a recess within the dielectric layer filling the trench to serve as an alignment mark; and polishing the selectively etched dielectric layer and leaving the alignment mark. The method may also include forming an optically opaque layer adjacent the polished dielectric layer and with the alignment mark causing a repeated alignment mark in the optically opaque layer. The alignment mark and/or repeated alignment mark may be used for alignment in a subsequent processing step.

Abstract: A halo implant (42, 44) for an MOS transistor (10) is formed in a semiconductor substrate (12) at a shallow implant angle, relative to normal to the substrate surface (29). A polysilicon gate structure (32, 33) is formed over a gate oxide (28) and then a hard mask (70), such as a TEOS-generated layer of silicon oxide, is deposited on an upper surface (68) of the gate. The mask is etched with a blanket anisotropic etch to form a cap-shaped mask (72). The shape of the cap causes the dopant for the halo implant to penetrate to a depth which follows the contour of the cap. Thus, halo implants may be formed which extend under the gate structure without the need for large angle implants and resultant shadowing problems caused by adjacent devices.