Patents by Inventor Scott Goad

Scott Goad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8010915
    Abstract: An optical proximity correction (OPC) method for photolithography applications can be utilized to reduce the processing time, cost, and post-OPC file size associated with conventional methods. The OPC method provides a target layout pattern that represents a corresponding mask pattern for a photolithography mask, and aligns the target layout pattern relative to a suitably dimensioned fragmentation grid. Then, at least one feature of the target layout pattern is fragmented using the fragmentation grid. Thereafter, a fragment data set is generated in response to the grid-based fragmentation of the target layout pattern.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: August 30, 2011
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Norman Shaowen Chen, Scott Goad, Paul Willard Ackmann
  • Publication number: 20100011335
    Abstract: An optical proximity correction (OPC) method for photolithography applications can be utilized to reduce the processing time, cost, and post-OPC file size associated with conventional methods. The OPC method provides a target layout pattern that represents a corresponding mask pattern for a photolithography mask, and aligns the target layout pattern relative to a suitably dimensioned fragmentation grid. Then, at least one feature of the target layout pattern is fragmented using the fragmentation grid. Thereafter, a fragment data set is generated in response to the grid-based fragmentation of the target layout pattern.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 14, 2010
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventors: Norman Shaowen CHEN, Scott GOAD, Paul Willard ACKMANN
  • Patent number: 6916716
    Abstract: Various methods of fabricating halo regions are disclosed. In one aspect, a method of manufacturing is provided that includes forming a symmetric transistor and an asymmetric transistor on a substrate. A first mask is formed on the substrate with a first opening to enable implantation formation of first and second halo regions proximate first and second source/drain regions of the symmetric transistor. First and second halo regions of a first dosage are formed beneath the first gate by implanting off-axis through the first opening. A second mask is formed on the substrate with a second opening to enable implantation formation of a third halo region proximate a source region of the second asymmetric transistor while preventing formation of a halo region proximate a drain region of the asymmetric transistor. A third halo region of a second dosage greater than the first dosage is formed by implanting off-axis through the second opening.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: July 12, 2005
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Scott Goad, James C. Pattison, Edward Ehrichs