Abstract: Embodiments herein describe performing an engineering change order (ECO) after a physical design team has begun (or finished) a physical design (PD) netlist. However, the ECO may describe changes or additions to the logic and/or nets using component names found in a design netlist that is different than the PD netlist. Embodiments herein rely on generating an equivalents nets file that the maps the components in the design netlist to the components in the PD netlist. When performing an ECO, the PD team can use this file to map the components in the ECO (which are based on the design netlist) to all the equivalent components in the PD netlist. The PD team then selects one of the equivalent components to alter as indicated in the ECO.

Abstract: Embodiments herein describe performing an engineering change order (ECO) after a physical design team has begun (or finished) a physical design (PD) netlist. However, the ECO may describe changes or additions to the logic and/or nets using component names found in a design netlist that is different than the PD netlist. Embodiments herein rely on generating an equivalents nets file that the maps the components in the design netlist to the components in the PD netlist. When performing an ECO, the PD team can use this file to map the components in the ECO (which are based on the design netlist) to all the equivalent components in the PD netlist. The PD team then selects one of the equivalent components to alter as indicated in the ECO.

Abstract: Embodiments herein describe performing an engineering change order (ECO) after a physical design team has begun (or finished) a physical design (PD) netlist. However, the ECO may describe changes or additions to the logic and/or nets using component names found in a design netlist that is different than the PD netlist. Embodiments herein rely on generating an equivalents nets file that the maps the components in the design netlist to the components in the PD netlist. When performing an ECO, the PD team can use this file to map the components in the ECO (which are based on the design netlist) to all the equivalent components in the PD netlist. The PD team then selects one of the equivalent components to alter as indicated in the ECO.

Abstract: Embodiments herein describe performing an engineering change order (ECO) after a physical design team has begun (or finished) a physical design (PD) netlist. However, the ECO may describe changes or additions to the logic and/or nets using component names found in a design netlist that is different than the PD netlist. Embodiments herein rely on generating an equivalents nets file that the maps the components in the design netlist to the components in the PD netlist. When performing an ECO, the PD team can use this file to map the components in the ECO (which are based on the design netlist) to all the equivalent components in the PD netlist. The PD team then selects one of the equivalent components to alter as indicated in the ECO.

Abstract: In a first aspect, a first method of designing a circuit is provided. The first method includes the steps of (1) providing a model of an original circuit design including a latch; (2) providing a model of a modified version of the original circuit design, wherein the modified version of the original circuit design includes a set of latches associated with the latch of the original circuit design and voting logic having inputs coupled to respective outputs of latches in the latch set; and (3) during Boolean equivalency checking (BEC), injecting an error on at most a largest minority of the inputs of the voting logic to test the voting logic function.

Abstract: In a first aspect, a first method of designing a circuit is provided. The first method includes the steps of (1) providing a model of an original circuit design including a latch; (2) providing a model of a modified version of the original circuit design, wherein the modified version of the original circuit design includes a set of latches associated with the latch of the original circuit design and voting logic having inputs coupled to respective outputs of latches in the latch set; and (3) during Boolean equivalency checking (BEC), injecting an error on at most a largest minority of the inputs of the voting logic to test the voting logic function.

Abstract: In a first aspect, a first method of designing a circuit is provided. The first method includes the steps of (1) providing a model of an original circuit design including a latch; (2) providing a model of a modified version of the original circuit design, wherein the modified version of the original circuit design includes a set of latches associated with the latch of the original circuit design and voting logic having inputs coupled to respective outputs of latches in the latch set; and (3) during Boolean equivalency checking (BEC), injecting an error on at most a largest minority of the inputs of the voting logic to test the voting logic function.

Abstract: In a first aspect, a first method of designing a circuit is provided. The first method includes the steps of (1) providing a model of an original circuit design including a latch; (2) providing a model of a modified version of the original circuit design, wherein the modified version of the original circuit design includes a set of latches associated with the latch of the original circuit design and voting logic having inputs coupled to respective outputs of latches in the latch set; and (3) during Boolean equivalency checking (BEC), injecting an error on at most a largest minority of the inputs of the voting logic to test the voting logic function.