Patents by Inventor Scott H. Milton
Scott H. Milton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11914481Abstract: A system and method for configuring fault tolerance in nonvolatile memory (NVM) are operative to set a first threshold value, declare one or more portions of NVM invalid based on an error criterion, track the number of declared invalid NVM portions, determine if the tracked number exceeds the first threshold value, and if the tracked number exceeds the first threshold value, perform one or more remediation actions, such as issue a warning or prevent backup of volatile memory data in a hybrid memory system. In the event of backup failure, an extent of the backup can still be assessed by determining the amount of erased NVM that has remained erased after the backup, or by comparing a predicted backup end point with an actual endpoint.Type: GrantFiled: January 13, 2023Date of Patent: February 27, 2024Assignee: NETLIST, INC.Inventors: Scott H. Milton, Jeffrey C. Solomon, Kenneth S. Post
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Publication number: 20230418712Abstract: A system and method for configuring fault tolerance in nonvolatile memory (NVM) are operative to set a first threshold value, declare one or more portions of NVM invalid based on an error criterion, track the number of declared invalid NVM portions, determine if the tracked number exceeds the first threshold value, and if the tracked number exceeds the first threshold value, perform one or more remediation actions, such as issue a warning or prevent backup of volatile memory data in a hybrid memory system. In the event of backup failure, an extent of the backup can still be assessed by determining the amount of erased NVM that has remained erased after the backup, or by comparing a predicted backup end point with an actual endpoint.Type: ApplicationFiled: January 13, 2023Publication date: December 28, 2023Applicant: Netlist, Inc.Inventors: Scott H. MILTON, Jeffrey C. SOLOMON, Kenneth S. POST
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Publication number: 20220222191Abstract: In certain embodiments, a memory module includes a printed circuit board (PCB) having an interface that couples it to a host system for provision of power, data, address and control signals. First, second, and third buck converters receive a pre-regulated input voltage and produce first, second and third regulated voltages. A converter circuit reduces the pre-regulated input voltage to provide a fourth regulated voltage. Synchronous dynamic random access memory (SDRAM) devices are coupled to one or more regulated voltages of the first, second, third and fourth regulated voltages, and a voltage monitor circuit monitors an input voltage and produces a signal in response to the input voltage having a voltage amplitude that is greater than a threshold voltage.Type: ApplicationFiled: January 24, 2022Publication date: July 14, 2022Applicant: Netlist, Inc.Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Publication number: 20220206905Abstract: A system and method for configuring fault tolerance in nonvolatile memory (NVM) are operative to set a first threshold value, declare one or more portions of NVM invalid based on an error criterion, track the number of declared invalid NVM portions, determine if the tracked number exceeds the first threshold value, and if the tracked number exceeds the first threshold value, perform one or more remediation actions, such as issue a warning or prevent backup of volatile memory data in a hybrid memory system. In the event of backup failure, an extent of the backup can still be assessed by determining the amount of erased NVM that has remained erased after the backup, or by comparing a predicted backup end point with an actual endpoint.Type: ApplicationFiled: December 13, 2021Publication date: June 30, 2022Applicant: Netlist, Inc.Inventors: Scott H. Milton, Jeffrey C. Solomon, Kenneth S. Post
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Patent number: 11232054Abstract: In certain embodiments, a memory module includes a printed circuit board (PCB) having an interface that couples it to a host system for provision of power, data, address and control signals. First, second, and third buck converters receive a pre-regulated input voltage and produce first, second and third regulated voltages. A converter circuit reduces the pre-regulated input voltage to provide a fourth regulated voltage. Synchronous dynamic random access memory (SDRAM) devices are coupled to one or more regulated voltages of the first, second, third and fourth regulated voltages, and a voltage monitor circuit monitors an input voltage and produces a signal in response to the input voltage having a voltage amplitude that is greater than a threshold voltage.Type: GrantFiled: May 24, 2021Date of Patent: January 25, 2022Assignee: NETLIST, INC.Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Patent number: 11200120Abstract: A system and method for configuring fault tolerance in nonvolatile memory (NVM) are operative to set a first threshold value, declare one or more portions of NVM invalid based on an error criterion, track the number of declared invalid NVM portions, determine if the tracked number exceeds the first threshold value, and if the tracked number exceeds the first threshold value, perform one or more remediation actions, such as issue a warning or prevent backup of volatile memory data in a hybrid memory system. In the event of backup failure, an extent of the backup can still be assessed by determining the amount of erased NVM that has remained erased after the backup, or by comparing a predicted backup end point with an actual endpoint.Type: GrantFiled: July 19, 2019Date of Patent: December 14, 2021Assignee: Netlist, Inc.Inventors: Scott H. Milton, Jeffrey C. Solomon, Kenneth S. Post
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Publication number: 20210279194Abstract: In certain embodiments, a memory module includes a printed circuit board (PCB) having an interface that couples it to a host system for provision of power, data, address and control signals. First, second, and third buck converters receive a pre-regulated input voltage and produce first, second and third regulated voltages. A converter circuit reduces the pre-regulated input voltage to provide a fourth regulated voltage. Synchronous dynamic random access memory (SDRAM) devices are coupled to one or more regulated voltages of the first, second, third and fourth regulated voltages, and a voltage monitor circuit monitors an input voltage and produces a signal in response to the input voltage having a voltage amplitude that is greater than a threshold voltage.Type: ApplicationFiled: May 24, 2021Publication date: September 9, 2021Applicant: Netlist, Inc.Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Patent number: 11016918Abstract: In certain embodiments, a memory module includes a printed circuit board (PCB) having an interface that couples it to a host system for provision of power, data, address and control signals. First, second, and third buck converters receive a pre-regulated input voltage and produce first, second and third regulated voltages. A converter circuit reduces the pre-regulated input voltage to provide a fourth regulated voltage. Synchronous dynamic random access memory (SDRAM) devices are coupled to one or more regulated voltages of the first, second, third and fourth regulated voltages, and a voltage monitor circuit monitors an input voltage and produces a signal in response to the input voltage having a voltage amplitude that is greater than a threshold voltage.Type: GrantFiled: December 30, 2020Date of Patent: May 25, 2021Assignee: Netlist, Inc.Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Publication number: 20210124701Abstract: In certain embodiments, a memory module includes a printed circuit board (PCB) having an interface that couples it to a host system for provision of power, data, address and control signals. First, second, and third buck converters receive a pre-regulated input voltage and produce first, second and third regulated voltages. A converter circuit reduces the pre-regulated input voltage to provide a fourth regulated voltage. Synchronous dynamic random access memory (SDRAM) devices are coupled to one or more regulated voltages of the first, second, third and fourth regulated voltages, and a voltage monitor circuit monitors an input voltage and produces a signal in response to the input voltage having a voltage amplitude that is greater than a threshold voltage.Type: ApplicationFiled: December 30, 2020Publication date: April 29, 2021Applicant: Netlist, Inc.Inventors: Hyun Lee, Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Publication number: 20190340080Abstract: A system and method for configuring fault tolerance in nonvolatile memory (NVM) are operative to set a first threshold value, declare one or more portions of NVM invalid based on an error criterion, track the number of declared invalid NVM portions, determine if the tracked number exceeds the first threshold value, and if the tracked number exceeds the first threshold value, perform one or more remediation actions, such as issue a warning or prevent backup of volatile memory data in a hybrid memory system. In the event of backup failure, an extent of the backup can still be assessed by determining the amount of erased NVM that has remained erased after the backup, or by comparing a predicted backup end point with an actual endpoint.Type: ApplicationFiled: July 19, 2019Publication date: November 7, 2019Applicant: Netlist, Inc.Inventors: Scott H. Milton, Jeffrey C. Solomon, Kenneth S. Post
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Patent number: 10372551Abstract: A system and method for configuring fault tolerance in nonvolatile memory (NVM) are operative to set a first threshold value, declare one or more portions of NVM invalid based on an error criterion, track the number of declared invalid NVM portions, determine if the tracked number exceeds the first threshold value, and if the tracked number exceeds the first threshold value, perform one or more remediation actions, such as issue a warning or prevent backup of volatile memory data in a hybrid memory system. In the event of backup failure, an extent of the backup can still be assessed by determining the amount of erased NVM that has remained erased after the backup, or by comparing a predicted backup end point with an actual endpoint.Type: GrantFiled: March 14, 2014Date of Patent: August 6, 2019Assignee: Netlist, Inc.Inventors: Scott H. Milton, Jeffrey C. Solomon, Kenneth S. Post
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Publication number: 20190004985Abstract: A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem, a data manager coupled to the non-volatile memory subsystem, a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.Type: ApplicationFiled: March 23, 2018Publication date: January 3, 2019Applicant: Netlist, Inc.Inventors: Hyun Lee, Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Patent number: 9928186Abstract: A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem, a data manager coupled to the non-volatile memory subsystem, a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.Type: GrantFiled: August 31, 2015Date of Patent: March 27, 2018Assignee: Netlist, Inc.Inventors: Hyun Lee, Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Patent number: 9921762Abstract: Data stored in a volatile memory subsystem is backed up redundantly into first and second channels of a non-volatile memory subsystem. The data is retrieved from the volatile memory subsystem upon detection of a trigger condition indicative of real or imminent power loss or reduction and multiple copies are stored in dedicated non-volatile memory channels. The stored copies may be error checked and corrected, and re-written if necessary. The redundantly backed up data can be subsequently retrieved from the non-volatile memory subsystem, error-corrected, and an error-free copy communicated to the volatile memory subsystem.Type: GrantFiled: September 17, 2014Date of Patent: March 20, 2018Assignee: Netlist, Inc.Inventors: Mike Hossein Amidi, Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Publication number: 20160342330Abstract: Certain embodiments described herein include a memory system having a volatile memory subsystem, a non-volatile memory subsystem, a controller coupled to the non-volatile memory subsystem, and a circuit coupled to the volatile memory subsystem, to the controller, and to a host system. In a first mode of operation, the circuit is operable to selectively isolate the controller from the volatile memory subsystem, and to selectively couple the volatile memory subsystem to the host system to allow data to be communicated between the volatile memory subsystem and the host system. In a second mode of operation, the circuit is operable to selectively couple the controller to the volatile memory subsystem to allow data to be communicated between the volatile memory subsystem and the nonvolatile memory subsystem using the controller, and the circuit is operable to selectively isolate the volatile memory subsystem from the host system.Type: ApplicationFiled: January 19, 2016Publication date: November 24, 2016Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Publication number: 20160202749Abstract: A memory system is described. The memory system includes one or more memory subsystems. The memory system also includes a power module coupled with at least one of the one or more memory subsystems. Further, the memory system includes a controller coupled with the one or more memory subsystems and the power module. The controller is configured to generate an energy threshold based on energy used for a backup operation.Type: ApplicationFiled: January 13, 2016Publication date: July 14, 2016Inventor: Scott H. Milton
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Publication number: 20160196223Abstract: A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem, a data manager coupled to the non-volatile memory subsystem, a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.Type: ApplicationFiled: August 31, 2015Publication date: July 7, 2016Inventors: Hyun Lee, Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Patent number: 9269437Abstract: Certain embodiments described herein include a memory system having a volatile memory subsystem, a non-volatile memory subsystem, a controller coupled to the non-volatile memory subsystem, and a circuit coupled to the volatile memory subsystem, to the controller, and to a host system. In a first mode of operation, the circuit is operable to selectively isolate the controller from the volatile memory subsystem, and to selectively couple the volatile memory subsystem to the host system to allow data to be communicated between the volatile memory subsystem and the host system. In a second mode of operation, the circuit is operable to selectively couple the controller to the volatile memory subsystem to allow data to be communicated between the volatile memory subsystem and the nonvolatile memory subsystem using the controller, and the circuit is operable to selectively isolate the volatile memory subsystem from the host system.Type: GrantFiled: September 17, 2014Date of Patent: February 23, 2016Assignee: NetList, Inc.Inventors: Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta
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Publication number: 20160018866Abstract: A memory system is described. The memory system includes a plurality of memory subsystems. Further, the memory system includes a controller coupled with the plurality of memory subsystems. The memory system also includes a power module including a storage device configured to store information and the power module is detachably coupled with the controller.Type: ApplicationFiled: July 15, 2015Publication date: January 21, 2016Inventor: Scott H. Milton
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Patent number: 9158684Abstract: A memory module that is couplable to a memory controller hub (MCH) of a host system includes a non-volatile memory subsystem, a data manager coupled to the non-volatile memory subsystem, a volatile memory subsystem coupled to the data manager and operable to exchange data with the non-volatile memory subsystem by way of the data manager, and a controller operable to receive read/write commands from the MCH and to direct transfer of data between any two or more of the MCH, the volatile memory subsystem, and the non-volatile memory subsystem based on the commands.Type: GrantFiled: September 17, 2014Date of Patent: October 13, 2015Assignee: NETLIST, INC.Inventors: Hyun Lee, Chi-She Chen, Jeffrey C. Solomon, Scott H. Milton, Jayesh Bhakta