Patents by Inventor Scott I. Chase

Scott I. Chase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9195791
    Abstract: Some embodiments of the present invention create a layout for a circuit design which includes one or more circuit modules. The system can receive a nominal implementation of a circuit module, and a user-defined module generator capable of generating one or more custom implementations of the circuit module from an existing implementation of the circuit module. Next, the system can create the layout for the circuit design by executing the user-defined module generator on at least one processor to generate one or more custom implementations of the circuit module from the nominal implementation. The system can then use the one or more custom implementations of the circuit module in the layout.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: November 24, 2015
    Assignee: SYNOPSYS, INC.
    Inventors: Haichun Chen, Greg Woolhiser, Scott I. Chase
  • Patent number: 8706699
    Abstract: A technique for maintaining a transaction history is described. This transaction history includes a sequence of commands or operations in an electronic-design-automation (EDA) environment. For subsets of one or more operations in the sequence of operations, the transaction history includes an associated transaction name, as well as a state of the of the subset, which is open after an initial EDA operation in the subset has been performed and is closed after a last EDA operation in the subset has been performed. This transaction history can be displayed in a window in a graphical user interface, and facilitates undoing and/or rolling back of changes to the data associated with one or more subsets. For example, if an error is detected, roll back of one or more subsets to a known software state or condition prior to the operations in the one or more subsets may be performed without user instructions using the transaction history.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: April 22, 2014
    Assignee: Synopsys, Inc.
    Inventors: Scott I. Chase, Jeffrey T. Brubaker
  • Patent number: 8677297
    Abstract: Roughly described, a system enables quick and accurate depiction to a user of multi-patterning layout violations so that they may be corrected manually and in real time, and without interfering with normal manual editing process. In one embodiment, the system involves iteratively building tree structures with nodes identifying islands and arcs identifying multi-patterning spacing violations between the connected islands. The system detects coloring violations during the building of these tree structures, using the relationships previously inserted. The coloring violations preferably are reported to a user in the form of visual indications of the cycles among the candidate spacing violations, with the candidate spacing violations also themselves indicated visually and individually. The user can see intuitively how to move the islands around, and in which directions and by what distance, in order to remove a multi-patterning spacing violation and thereby break the cycle.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: March 18, 2014
    Assignee: Synopsys, Inc.
    Inventors: Scott I. Chase, Zuo Dai, Dick Liu, Ming Su
  • Publication number: 20130074024
    Abstract: Roughly described, a system enables quick and accurate depiction to a user of multi-patterning layout violations so that they may be corrected manually and in real time, and without interfering with normal manual editing process. In one embodiment, the system involves iteratively building tree structures with nodes identifying islands and arcs identifying multi-patterning spacing violations between the connected islands. The system detects coloring violations during the building of these tree structures, using the relationships previously inserted. The coloring violations preferably are reported to a user in the form of visual indications of the cycles among the candidate spacing violations, with the candidate spacing violations also themselves indicated visually and individually. The user can see intuitively how to move the islands around, and in which directions and by what distance, in order to remove a multi-patterning spacing violation and thereby break the cycle.
    Type: Application
    Filed: November 13, 2012
    Publication date: March 21, 2013
    Inventors: Scott I. Chase, Zuo Dai, Dick Liu, Ming Su
  • Patent number: 8312410
    Abstract: Some embodiments provide a system that improves performance during parameterized cell instantiation in an electronic design automation (EDA) application. During operation, the system persists evaluation results associated with a parameterized cell in the design within a session of the EDA application so that the evaluation results are available even after they have been flushed from memory. Further, the system can persist the evaluation results across sessions of the EDA application. Next, the system uses the persisted evaluation results to instantiate the parameterized cell without re-evaluating the parameterized cell. Finally, the system discards the persisted evaluation results based at least on a dependency associated with the parameterized cell.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: November 13, 2012
    Assignee: Synopsys, Inc.
    Inventors: William K. Foster, Scott I. Chase
  • Publication number: 20110296364
    Abstract: Some embodiments of the present invention create a layout for a circuit design which includes one or more circuit modules. The system can receive a nominal implementation of a circuit module, and a user-defined module generator capable of generating one or more custom implementations of the circuit module from an existing implementation of the circuit module. Next, the system can create the layout for the circuit design by executing the user-defined module generator on at least one processor to generate one or more custom implementations of the circuit module from the nominal implementation. The system can then use the one or more custom implementations of the circuit module in the layout.
    Type: Application
    Filed: June 1, 2010
    Publication date: December 1, 2011
    Applicant: SYNOPSYS, INC.
    Inventors: Haichun Chen, Greg Woolhiser, Scott I. Chase
  • Publication number: 20110219349
    Abstract: Some embodiments provide a system that improves performance during parameterized cell instantiation in an electronic design automation (EDA) application. During operation, the system persists evaluation results associated with a parameterized cell in the design within a session of the EDA application so that the evaluation results are available even after they have been flushed from memory. Further, the system can persist the evaluation results across sessions of the EDA application. Next, the system uses the persisted evaluation results to instantiate the parameterized cell without re-evaluating the parameterized cell. Finally, the system discards the persisted evaluation results based at least on a dependency associated with the parameterized cell.
    Type: Application
    Filed: March 5, 2010
    Publication date: September 8, 2011
    Applicant: SYNOPSYS, INC.
    Inventors: William K. Foster, Scott I. Chase
  • Publication number: 20110016094
    Abstract: A technique for maintaining a transaction history is described. This transaction history includes a sequence of commands or operations in an electronic-design-automation (EDA) environment. For subsets of one or more operations in the sequence of operations, the transaction history includes an associated transaction name, as well as a state of the of the subset, which is open after an initial EDA operation in the subset has been performed and is closed after a last EDA operation in the subset has been performed. This transaction history can be displayed in a window in a graphical user interface, and facilitates undoing and/or rolling back of changes to the data associated with one or more subsets. For example, if an error is detected, roll back of one or more subsets to a known software state or condition prior to the operations in the one or more subsets may be performed without user instructions using the transaction history.
    Type: Application
    Filed: October 30, 2009
    Publication date: January 20, 2011
    Applicant: SYNOPSYS, INC.
    Inventors: Scott I. Chase, Jeffrey T. Brubaker