Abstract: Link speed negotiation for 64 Gbps is done at 32 Gbps to allow only two speeds to be used during link state negotiation. The desire for 64 Gbps operation is indicated in a field shared during link state negotiation. After link speed negotiation is completed at 32 Gbps, a determination is made whether 32 or 64 Gbps operation is desired. If 32 Gbps operation is desired, procedures continue as in the prior operations. If 64 Gbps operation is desired, a new procedure is performed. The new procedure provides time for the optical transceiver to changeover from the PAM2 (pulse amplitude modulation) or binary operation used in 32 Gbps operation to the PAM4 multi-level operation used in 64 Gbps operation. After determining that the optical transceiver is ready to transmit, transmitter training is performed, with increased handshaking to provide improved granularity. After transmitter training is complete, conventional link initialization is performed.

Abstract: The PCS and FEC layers are combined into a single layer and the number of lanes is set at four lanes. The combination allows removal of many modules as compared to a serial arrangement of a PCS layer and an FEC layer. The reduction in the number of lanes, as compared to 100 Gbps Ethernet, provides a further simplification or cost reduction by further reducing the needed gates of an ASIC to perform the functions. Changing the lanes in the FEC layer necessitates changing the alignment marker structure. In the preferred embodiment a lane zero marker is used as the first alignment marker in each lane to allow rapid sync. A second alignment marker indicating the particular lane follows the first alignment marker.

Abstract: The FC port state machine enhanced by determining if various lanes are configured to be operated in 128 Gbps mode by operating as parallel lanes as indicated by using a reserved bit in a link training field. If so and if all of the ports are 32 Gbps ports and pass training, then four lanes can be combined to form a 128 Gbps link. If the ports are configured for 128 Gbps only operation and at least one lane does not negotiate to 32 Gbps or fails training, the link is not activated and none of the lanes are activated. If the ports are configured to do either 128 Gbps or independent operation and at least one lane cannot operate at 128 Gbps, then the lanes operate independently at the negotiated and trained speed. If the lanes are configured for only independent operation the transceiver develops independent links as negotiated.

Abstract: Link speed negotiation for 64 Gbps is done at 32 Gbps to allow only two speeds to be used during link state negotiation. The desire for 64 Gbps operation is indicated in a field shared during link state negotiation. After link speed negotiation is completed at 32 Gbps, a determination is made whether 32 or 64 Gbps operation is desired. If 32 Gbps operation is desired, procedures continue as in the prior operations. If 64 Gbps operation is desired, a new procedure is performed. The new procedure provides time for the optical transceiver to changeover from the PAM2 (pulse amplitude modulation) or binary operation used in 32 Gbps operation to the PAM4 multi-level operation used in 64 Gbps operation. After determining that the optical transceiver is ready to transmit, transmitter training is performed, with increased handshaking to provide improved granularity. After transmitter training is complete, conventional link initialization is performed.

Abstract: The FC port state machine enhanced by determining if various lanes are configured to be operated in 128 Gbps mode by operating as parallel lanes as indicated by using a reserved bit in a link training field. If so and if all of the ports are 32 Gbps ports and pass training, then four lanes can be combined to form a 128 Gbps link. If the ports are configured for 128 Gbps only operation and at least one lane does not negotiate to 32 Gbps or fails training, the link is not activated and none of the lanes are activated. If the ports are configured to do either 128 Gbps or independent operation and at least one lane cannot operate at 128 Gbps, then the lanes operate independently at the negotiated and trained speed. If the lanes are configured for only independent operation the transceiver develops independent links as negotiated.

Abstract: The PCS and FEC layers are combined into a single layer and the number of lanes is set at four lanes. The combination allows removal of many modules as compared to a serial arrangement of a PCS layer and an FEC layer. The reduction in the number of lanes, as compared to 100 Gbps Ethernet, provides a further simplification or cost reduction by further reducing the needed gates of an ASIC to perform the functions. Changing the lanes in the FEC layer necessitates changing the alignment marker structure. In the preferred embodiment a lane zero marker is used as the first alignment marker in each lane to allow rapid sync. A second alignment marker indicating the particular lane follows the first alignment marker.

Abstract: The FC port state machine enhanced by determining if various lanes are configured to be operated in 128 Gbps mode by operating as parallel lanes as indicated by using a reserved bit in a link training field. If so and if all of the ports are 32 Gbps ports and pass training, then four lanes can be combined to form a 128 Gbps link. If the ports are configured for 128 Gbps only operation and at least one lane does not negotiate to 32 Gbps or fails training, the link is not activated and none of the lanes are activated. If the ports are configured to do either 128 Gbps or independent operation and at least one lane cannot operate at 128 Gbps, then the lanes operate independently at the negotiated and trained speed. If the lanes are configured for only independent operation the transceiver develops independent links as negotiated.

Abstract: The PCS and FEC layers are combined into a single layer and the number of lanes is set at four lanes. The combination allows removal of many modules as compared to a serial arrangement of a PCS layer and an FEC layer. The reduction in the number of lanes, as compared to 100 Gbps Ethernet, provides a further simplification or cost reduction by further reducing the needed gates of an ASIC to perform the functions. Changing the lanes in the FEC layer necessitates changing the alignment marker structure. In the preferred embodiment a lane zero marker is used as the first alignment marker in each lane to allow rapid sync. A second alignment marker indicating the particular lane follows the first alignment marker.

Abstract: The FC port state machine enhanced by determining if various lanes are configured to be operated in 128 Gbps mode by operating as parallel lanes as indicated by using a reserved bit in a link training field. If so and if all of the ports are 32 Gbps ports and pass training, then four lanes can be combined to form a 128 Gbps link. If the ports are configured for 128 Gbps only operation and at least one lane does not negotiate to 32 Gbps or fails training, the link is not activated and none of the lanes are activated. If the ports are configured to do either 128 Gbps or independent operation and at least one lane cannot operate at 128 Gbps, then the lanes operate independently at the negotiated and trained speed. If the lanes are configured for only independent operation the transceiver develops independent links as negotiated.

Abstract: The present invention relates to goods or cargo carrying a cart or wagon which can be hitched to the rear of a variety of vehicle by means of a height adjuster. The cart or wagon comprises; a height adjuster, floor or tray, and removable or pivoted wheels with hand breaks. The invention also relates to a lifting mechanism for raising and lowering the cart or wagon to easily load or unload goods which can be carried entirely on the receiver hitch bar of a vehicle. The invention also relates to a lifting mechanism for raising and lowering a platform onto which a scooter or motorcycle has been loaded which can be carried entirely on the receiver hitch bar of a vehicle.

Abstract: The PCS and FEC layers are combined into a single layer and the number of lanes is set at four lanes. The combination allows removal of many modules as compared to a serial arrangement of a PCS layer and an FEC layer. The reduction in the number of lanes, as compared to 100 Gbps Ethernet, provides a further simplification or cost reduction by further reducing the needed gates of an ASIC to perform the functions. Changing the lanes in the FEC layer necessitates changing the alignment marker structure. In the preferred embodiment a lane zero marker is used as the first alignment marker in each lane to allow rapid sync. A second alignment marker indicating the particular lane follows the first alignment marker.