Abstract: An Open Compute Project (OCP) mezzanine riser with repurposed connectivity to allow for increased PCIe card count on a motherboard server. The OCP mezzanine riser includes at least one OCP connector, where the OCP connectors are mounted on the bottom of the mezzanine riser card and mate with at least one of three OCP connection points that are mounted on a server motherboard. Further, the OCP mezzanine riser includes one or more PCIe lanes mounted on the top of the mezzanine riser card, where a PCIe card may be connected to the one or more PCIe lanes of the mezzanine riser.

Abstract: A power supply unit (PSU) performs a PSU fault diagnosis using a PSU fault detection module. The PSU fault detection module detects a diagnostic trigger event and initiates a series of checks of selected sub-systems. The PSU fault detection module determines whether the trigger event occurred while the PSU was connected within an information handling system (IHS) or physically removed from the IHS. If the trigger event occurred while the PSU was connected within an information handling system (IHS), the PSU fault detection module electrically isolates the PSU from the IHS using an ORing device, which blocks current flowing into the PSU. The PSU fault detection module determines whether a short circuit exists within the electrically isolated PSU. If a short circuit is identified, the PSU fault detection module determines that the PSU is not functioning properly and provides a notification of a malfunction of the PSU.

Abstract: A method may include, receiving, by a controller integral to a chassis, a user request to apply a switch configuration. The method may also include communicating from the controller to a remote access controller (RAC) integral to at least one module disposed in a plurality of slots of the chassis an indication that a user has requested application of a switch configuration. The method may further include receiving at the controller, in response to the indication, a request to download a switch configuration file from the controller to the RAC. The method may additionally include transferring from the controller, in response to the request to download the switch configuration file, the switch configuration file to the RAC such that the RAC applies parameters set forth in the switch configuration file in order to configure an in-band switch associated with the module comprising the RAC.

Abstract: An Open Compute Project (OCP) mezzanine riser with repurposed connectivity to allow for increased PCIe card count on a motherboard server. The OCP mezzanine riser includes at least one OCP connector, where the OCP connectors are mounted on the bottom of the mezzanine riser card and mate with at least one of three OCP connection points that are mounted on a server motherboard. Further, the OCP mezzanine riser includes one or more PCIe lanes mounted on the top of the mezzanine riser card, where a PCIe card may be connected to the one or more PCIe lanes of the mezzanine riser.

Abstract: A power supply unit (PSU) performs a PSU fault diagnosis using a PSU fault detection module. The PSU fault detection module detects a diagnostic trigger event and initiates a series of checks of selected sub-systems. The PSU fault detection module determines whether the trigger event occurred while the PSU was connected within an information handling system (IHS) or physically removed from the IHS. If the trigger event occurred while the PSU was connected within an information handling system (IHS), the PSU fault detection module electrically isolates the PSU from the IHS using an ORing device, which blocks current flowing into the PSU. The PSU fault detection module determines whether a short circuit exists within the electrically isolated PSU. If a short circuit is identified, the PSU fault detection module determines that the PSU is not functioning properly and provides a notification of a malfunction of the PSU.

Abstract: An information handling system is set forth which includes a fully connected 4S topology that can also be populated with two processors and two link modules (e.g., two passive “slugs”) to implement a fully connected 2S topology. More specifically, the link module is a printed circuit board that implements a loopback connection between certain links of the architecture. In certain embodiment, the link module includes no electrical components. The link module merely includes a set of electrical connections (e.g., copper traces) connecting pads (e.g., gold plated pads) on a thick printed circuit board (PCB) dielectric material that is shaped to fit the processor socket. The link module is used to carry user data when the information handling system is configured in a 2S topology. The link module includes proper lane assignment that allows the module to be passive without performance reduction.

Abstract: A method may include, receiving, by a controller integral to a chassis, a user request to apply a switch configuration. The method may also include communicating from the controller to a remote access controller (RAC) integral to at least one module disposed in a plurality of slots of the chassis an indication that a user has requested application of a switch configuration. The method may further include receiving at the controller, in response to the indication, a request to download a switch configuration file from the controller to the RAC. The method may additionally include transferring from the controller, in response to the request to download the switch configuration file, the switch configuration file to the RAC such that the RAC applies parameters set forth in the switch configuration file in order to configure an in-band switch associated with the module comprising the RAC.

Abstract: An information handling system (IHS) is disclosed providing a power supply operable to provide an output current to the IHS during power initiation. The IHS may also include a first power component associated with a first power stage wherein the first power stage may have a first current threshold. Furthermore, the IHS may include a power control logic coupled to the power supply and the first power component. As such, the power control logic may be operable to communicate the first power stage to the power supply, and if the output current does not exceed the first current threshold during the first power stage, the power control logic may be operable to communicate a second power stage having a second current threshold to the power supply.

Abstract: An information handling system (IHS) is disclosed providing a power supply operable to provide an output current to the IHS during power initiation. The IHS may also include a first power component associated with a first power stage wherein the first power stage may have a first current threshold. Furthermore, the IHS may include a power control logic coupled to the power supply and the first power component. As such, the power control logic may be operable to communicate the first power stage to the power supply, and if the output current does not exceed the first current threshold during the first power stage, the power control logic may be operable to communicate a second power stage having a second current threshold to the power supply.

Abstract: An information handling system is set forth which includes a fully connected 4S topology that can also be populated with two processors and two link modules (e.g., two passive “slugs”) to implement a fully connected 2S topology. More specifically, the link module is a printed circuit board that implements a loopback connection between certain links of the architecture. In certain embodiment, the link module includes no electrical components. The link module merely includes a set of electrical connections (e.g., copper traces) connecting pads (e.g., gold plated pads) on a thick printed circuit board (PCB) dielectric material that is shaped to fit the processor socket. The link module is used to carry user data when the information handling system is configured in a 2S topology. The link module includes proper lane assignment that allows the module to be passive without performance reduction.