Abstract: The present invention relates to an image encoding and decoding technique, and more particularly, to an image encoder and decoder using unidirectional prediction. The image encoder includes a dividing unit to divide a macro block into a plurality of sub-blocks, a unidirectional application determining unit to determine whether an identical prediction mode is applied to each of the plurality of sub-blocks, and a prediction mode determining unit to determine a prediction mode with respect to each of the plurality of sub-blocks based on a determined result of the unidirectional application determining unit.

Abstract: A lead frame for a semiconductor package includes a base metal layer made of copper (Cu), Cu alloy or iron-nickel (Fe-Ni) alloy, an underlying plating layer formed on at least one surface of the base metal layer and made of Ni or Ni alloy, an intermediate plating layer formed on the underlying plating layer to a thickness of about 0.00025 to about 0.1 &mgr;m (about 0.1 to about 4 microinches) and made of palladium (Pd) or Pd alloy, and an outer plating layer formed in the intermediate plating layer to a thickness of about 0.05 to about 0.75 &mgr;m (about 2 to 30 microinches) and made of silver (Ag) or Ag alloy. Since an Ag plated layer is formed as the outer plating layer, excellent oxidation resistance and corrosion resistance can be exhibited even under a high-temperature thermal condition, thereby improving wire bondability, solderability and good adhesion with epoxy for use in the semiconductor package, and preventing heel crack at a wire bonding portion.

Abstract: A method for manufacturing a lead frame including the steps of electrocleaning the surface of a thin plate material, electropolishing the electrocleaned thin plate material, removing inclusions on the surface of the electropolished thin plate material, rinsing the inclusion-removed thin plate material with an acidic solution, and forming multi-plated layers on the rinsed material. The lead frame manufactured by the method has 5 or less inclusions each having approximately 1 &mgr;m, on the surface area of 1600 &mgr;m2, which impede a wire bonding property or solder wettability of the lead frame.

Abstract: A lead frame for a semiconductor package and a method for manufacturing the lead frame. In the manufacture of the lead frame, a protective layer is formed with nickel (Ni) or Ni alloy on a metal substrate, an intermediate layer is then formed with palladium (Pd) or Pd alloy on the protective layer. Then, Pd and gold (Au) are alternately plated on the surface of the intermediate layer to form an outermost layer including both Pd and Au particles thereon.

Abstract: A lead frame for a semiconductor package includes a base metal layer made of copper (Cu), Cu alloy or iron-nickel (Fe-Ni) alloy, an underlying plating layer formed on at least one surface of the base metal layer and made of Ni or Ni alloy, an intermediate plating layer formed on the underlying plating layer to a thickness of about 0.00025 to about 0.1 &mgr;m (about 0.1 to about 4 microinches) and made of palladium (Pd) or Pd alloy, and an outer plating layer formed in the intermediate plating layer to a thickness of about 0.05 to about 0.75 &mgr;m (about 2 to 30 microinches) and made of silver (Ag) or Ag alloy. Since an Ag plated layer is formed as the outer plating layer, excellent oxidation resistance and corrosion resistance can be exhibited even under a high-temperature thermal condition, thereby improving wire bondability, solderability and good adhesion with epoxy for use in the semiconductor package, and preventing heel crack at a wire bonding portion.

Abstract: A method for manufacturing a lead frame including the steps of electrocleaning the surface of a thin plate material, electropolishing the electrocleaned thin plate material, removing inclusions on the surface of the electropolished thin plate material, rinsing the inclusion-removed thin plate material with an acidic solution, and forming multi-plated layers on the rinsed material. The lead frame manufactured by the method has 5 or less inclusions each having approximately 1 &mgr;m, on the surface area of 1600 &mgr;m2, which impede a wire bonding property or solder wettability of the lead frame.

Abstract: A lead frame for semiconductor devices including a metal substrate having inner leads and outer leads, a nickel thin layer formed on the metal substrate, an outer layer formed of palladium or a palladium alloy on the nickel thin layer, and a protection layer formed of gold or platinum between the nickel thin layer and the outer layer.

Abstract: A lead frame plating method including the steps of (a) forming an intermediate layer on the upper surface of a metal substrate, (b) submerging the metal substrate into a plating solution, and (c) forming a passive layer to a thickness of 0.01 to 1.5 microinches on the upper surface of the intermediate layer by applying a modulated current to the plating solution and the metal substrate.