Abstract: Aspects for increasing efficiency of memory accesses during graphics rendering are provided. A preferred method aspect includes providing a plurality of memory banks for data, and decoding input signals that indicate accessing of at least one of the plurality of memory banks for a desired plurality of words of data. The method further includes splitting data access across the plurality of memory banks to allow parallel selection of an output from at least one of the plurality of memory banks as the desired plurality of words of the data, wherein latency of data access is amortized.