Patents by Inventor Sebastien Loiseau

Sebastien Loiseau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR MANUFACTURING A PIEZOELECTRIC RESONATOR
    Publication number: 20220231652
    Abstract: A method for manufacturing a piezoelectric resonator. The method includes: depositing a piezoelectric layer and forming a recess in a lateral area in such a way that a silicon functional layer is exposed inside the recess, forming a silicide layer on a surface of the silicon functional layer exposed inside the recess, forming a diffusion barrier layer on the silicide layer, depositing and structuring a first and second metallization layer in such a way that a supply line and two connection elements are formed, forming the oscillating structure by structuring the silicon functional layer, the silicon functional layer of the oscillating structure being able to be electrically contacted via the first connection element and forming a lower electrode of the resonator, the first metallization layer of the oscillating structure being able to be electrically contacted via the second connection element and forming an upper electrode of the resonator.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 21, 2022
    Inventors: Friedjof Heuck, Marcus Pritschow, Markus Kuhnke, Peter Schmollngruber, Ricardo Zamora, Sebastien Loiseau, Stefan Majoni, Stefan Krause, Viktor Morosow
  • Method for producing thin MEMS wafers
    Patent number: 10793430
    Abstract: A method for producing thin MEMS wafers including: (A) providing an SOI wafer having an upper silicon layer, a first SiO2 layer and a lower silicon layer, the first SiO2 layer being situated between the upper silicon layer and the lower silicon layer, (B) producing a second SiO2 layer on the upper silicon layer, (C) producing a MEMS structure on the second SiO2 layer, (D) introducing clearances into the lower silicon layer down to the first SiO2 layer, (E) etching the first SiO2 layer and thus removing the lower silicon layer.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: October 6, 2020
    Assignee: Robert Bosch GmbH
    Inventors: Sebastien Loiseau, Arnim Hoechst, Bernhard Gehl, Eugene Moliere Tanguep Njiokep, Sandra Altmannshofer
  • METHOD FOR PRODUCING THIN MEMS WAFERS
    Publication number: 20190092631
    Abstract: A method for producing thin MEMS wafers including: (A) providing an SOI wafer having an upper silicon layer, a first SiO2 layer and a lower silicon layer, the first SiO2 layer being situated between the upper silicon layer and the lower silicon layer, (B) producing a second SiO2 layer on the upper silicon layer, (C) producing a MEMS structure on the second SiO2 layer, (D) introducing clearances into the lower silicon layer down to the first SiO2 layer, (E) etching the first SiO2 layer and thus removing the lower silicon layer.
    Type: Application
    Filed: September 14, 2018
    Publication date: March 28, 2019
    Inventors: Sebastien Loiseau, Arnim Hoechst, Bernhard Gehl, Eugene Moliere Tanguep Njiokep, Sandra Altmannshofer