Patents by Inventor Sedat Oelcer
Sedat Oelcer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11381258Abstract: In one embodiment, a system includes a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. The logic is configured to cause the processor to write, by the processor, data to a storage medium of a data storage system using a partial reverse concatenated modulation code. The partial reverse concatenated modulation code comprises encoding the data by applying a C2 encoding scheme prior to encoding the data by applying one or more modulation encoding schemes, followed by encoding the data by applying a C1 encoding scheme subsequent to the encoding of the data with the one or more modulation encoding schemes.Type: GrantFiled: January 6, 2020Date of Patent: July 5, 2022Assignee: Awemane Ltd.Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Patent number: 10680655Abstract: In one embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. The embodied program instructions are readable/executable by a processor to cause the processor to write, by the processor, data to a storage medium of a data storage system using a partial reverse concatenated modulation code. The partial reverse concatenated modulation code includes encoding the data by applying a C2 encoding scheme prior to encoding the data by applying one or more modulation encoding schemes, followed by encoding the data by applying a C1 encoding scheme subsequent to the encoding of the data with the one or more modulation encoding schemes. Other computer program products for writing data to a storage medium of a data storage system using a partial reverse concatenated modulation code are presented according to more embodiments.Type: GrantFiled: October 22, 2015Date of Patent: June 9, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Publication number: 20200153460Abstract: In one embodiment, a system includes a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. The logic is configured to cause the processor to write, by the processor, data to a storage medium of a data storage system using a partial reverse concatenated modulation code. The partial reverse concatenated modulation code comprises encoding the data by applying a C2 encoding scheme prior to encoding the data by applying one or more modulation encoding schemes, followed by encoding the data by applying a C1 encoding scheme subsequent to the encoding of the data with the one or more modulation encoding schemes.Type: ApplicationFiled: January 6, 2020Publication date: May 14, 2020Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Patent number: 10484018Abstract: In one embodiment, a method includes writing data to a storage medium, via a write channel, by applying a partial reverse concatenated modulation code to the data prior to storing encoded data to the storage medium. The applying the partial reverse concatenated modulation code to the data includes application of a C2 encoding scheme to the data to produce C2-encoded data prior to application of one or more modulation encoding schemes to the C2-encoded data to produce modulated data, followed by application of a C1 encoding scheme to the modulated data subsequent to the application of the one or more modulation encoding schemes to produce the encoded data.Type: GrantFiled: January 12, 2017Date of Patent: November 19, 2019Assignee: International Business Machines CorporationInventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Patent number: 9659593Abstract: According to one embodiment, a method for processing data includes directing first data through a first FIR gain module in response to a determination that the first data is being read from a magnetic tape medium in an asynchronous mode to control FIR gain of the first data. The method also includes directing second data through a second FIR gain module in response to a determination that the second data is being read from the magnetic tape medium in a synchronous mode to control FIR gain of the second data. Other systems and methods for processing data using dynamic gain control with adaptive equalizers are presented according to more embodiments.Type: GrantFiled: December 2, 2015Date of Patent: May 23, 2017Assignee: International Business Machines CorporationInventors: Katherine T. Blinick, Robert A. Hutchins, Sedat Oelcer
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Publication number: 20170126254Abstract: In one embodiment, a method includes writing data to a storage medium, via a write channel, by applying a partial reverse concatenated modulation code to the data prior to storing encoded data to the storage medium. The applying the partial reverse concatenated modulation code to the data includes application of a C2 encoding scheme to the data to produce C2-encoded data prior to application of one or more modulation encoding schemes to the C2-encoded data to produce modulated data, followed by application of a C1 encoding scheme to the modulated data subsequent to the application of the one or more modulation encoding schemes to produce the encoded data.Type: ApplicationFiled: January 12, 2017Publication date: May 4, 2017Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Patent number: 9633690Abstract: In one embodiment, a system for cycle-slip resilient iterative read channel operation includes a processor and logic integrated with and/or executable by the processor. The logic is configured to, in an iterative process until a maximum number of iterations has been reached or a valid codeword is produced, execute cycle-slip detection on signal samples to detect one or more cycle-slip events. Also, the logic is configured to selectively alter a timing estimate driving a phase-locked loop (PLL) during any time interval determined to experience a cycle slip in a first pass as indicated by one or more cycle-slip pointers. Additionally, the logic is configured to generate a set of decisions provided by a detector and generate a set of decisions provided by a decoder. Moreover, the logic is configured to output decoding information relating to the signal samples in response to a decoding algorithm producing a valid codeword.Type: GrantFiled: November 2, 2015Date of Patent: April 25, 2017Assignee: International Business Machines CorporationInventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Patent number: 9558782Abstract: In one embodiment, a data storage system includes a write channel for writing data to a storage medium, the write channel configured to utilize a partial reverse concatenated modulation code. The write channel includes logic adapted for encoding data sets using a C2 encoding scheme, logic adapted for adding a header to each subunit of the data sets, logic adapted for encoding the headers of the data sets with a first modulation encoding scheme, logic adapted for encoding data portions of the data sets with a second modulation encoding scheme, logic adapted for encoding portions of the one or more C2-encoded data sets using a C1 encoding scheme, logic adapted for combining the C1-encoded portions with the modulation-encoded headers of the C2-encoded data sets using a multiplexer, and logic adapted for writing the one or more combined C1 - and C2-encoded data sets to data tracks.Type: GrantFiled: May 29, 2012Date of Patent: January 31, 2017Assignee: International Business Machines CorporationInventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Patent number: 9418698Abstract: According to one embodiment, a magnetic tape drive includes a controller configured to direct first data through a first finite impulse response (FIR) gain module in response to a determination that the first data is being read from a magnetic tape medium in an asynchronous mode to control FIR gain of the first data. The controller is also configured to direct second data through a second FIR gain module in response to a determination that the second data is being read from the magnetic tape medium in a synchronous mode to control FIR gain of the second data. A FIR gain value of the second FIR gain module is automatically controlled. Other systems for dynamic gain control with adaptive equalizers are described according to more embodiments.Type: GrantFiled: December 2, 2015Date of Patent: August 16, 2016Assignee: International Business Machines CorporationInventors: Katherine T. Blinick, Robert A. Hutchins, Sedat Oelcer
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Patent number: 9318148Abstract: In one embodiment, a tape drive system includes a soft detector having logic configured to execute a first forward loop of a detection algorithm on a first block of signal samples during a first time interval, execute a first reverse loop of the detection algorithm on the first block of signal samples during a second time interval, execute a second reverse loop of the detection algorithm on the first block of signal samples during a fifth time interval, and execute a second forward loop of the detection algorithm on the first block of signal samples during a fourth time interval using second soft information. Other tape drive systems and computer program products for decoding data are presented in more embodiments.Type: GrantFiled: August 8, 2014Date of Patent: April 19, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Publication number: 20160093326Abstract: According to one embodiment, a magnetic tape drive includes a controller configured to direct first data through a first finite impulse response (FIR) gain module in response to a determination that the first data is being read from a magnetic tape medium in an asynchronous mode to control FIR gain of the first data. The controller is also configured to direct second data through a second FIR gain module in response to a determination that the second data is being read from the magnetic tape medium in a synchronous mode to control FIR gain of the second data. A FIR gain value of the second FIR gain module is automatically controlled. Other systems for dynamic gain control with adaptive equalizers are described according to more embodiments.Type: ApplicationFiled: December 2, 2015Publication date: March 31, 2016Inventors: Katherine T. Blinick, Robert A. Hutchins, Sedat Oelcer
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Publication number: 20160093325Abstract: According to one embodiment, a method for processing data includes directing first data through a first FIR gain module in response to a determination that the first data is being read from a magnetic tape medium in an asynchronous mode to control FIR gain of the first data. The method also includes directing second data through a second FIR gain module in response to a determination that the second data is being read from the magnetic tape medium in a synchronous mode to control FIR gain of the second data. Other systems and methods for processing data using dynamic gain control with adaptive equalizers are presented according to more embodiments.Type: ApplicationFiled: December 2, 2015Publication date: March 31, 2016Inventors: Katherine T. Blinick, Robert A. Hutchins, Sedat Oelcer
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Publication number: 20160055882Abstract: In one embodiment, a system for cycle-slip resilient iterative read channel operation includes a processor and logic integrated with and/or executable by the processor. The logic is configured to, in an iterative process until a maximum number of iterations has been reached or a valid codeword is produced, execute cycle-slip detection on signal samples to detect one or more cycle-slip events. Also, the logic is configured to selectively alter a timing estimate driving a phase-locked loop (PLL) during any time interval determined to experience a cycle slip in a first pass as indicated by one or more cycle-slip pointers. Additionally, the logic is configured to generate a set of decisions provided by a detector and generate a set of decisions provided by a decoder. Moreover, the logic is configured to output decoding information relating to the signal samples in response to a decoding algorithm producing a valid codeword.Type: ApplicationFiled: November 2, 2015Publication date: February 25, 2016Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Publication number: 20160043742Abstract: In one embodiment, a computer program product includes a computer readable storage medium having program instructions embodied therewith. The computer readable storage medium is not a transitory signal per se. The embodied program instructions are readable/executable by a processor to cause the processor to write, by the processor, data to a storage medium of a data storage system using a partial reverse concatenated modulation code. The partial reverse concatenated modulation code includes encoding the data by applying a C2 encoding scheme prior to encoding the data by applying one or more modulation encoding schemes, followed by encoding the data by applying a C1 encoding scheme subsequent to the encoding of the data with the one or more modulation encoding schemes. Other computer program products for writing data to a storage medium of a data storage system using a partial reverse concatenated modulation code are presented according to more embodiments.Type: ApplicationFiled: October 22, 2015Publication date: February 11, 2016Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Patent number: 9251843Abstract: According to one embodiment, a computer program product for dropout detection in a read channel includes a computer readable storage medium having program code embodied therewith, the embedded program code being readable and/or executable by a processor to execute dropout detection on a block of signal samples to detect one or more dropout events employing a set of decisions provided by a detector executing a detection algorithm, determine an approximate location for each of the one or more detected dropout events, statistically characterize the one or more detected dropout events to calculate one or more dropout profiles, and selectively filter the block of signal samples during a duration of each of the detected dropout events. Other computer program products, systems, and methods for detecting dropouts are presented in more embodiments.Type: GrantFiled: December 23, 2014Date of Patent: February 2, 2016Assignee: International Business Machines CorporationInventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Publication number: 20160019930Abstract: According to one embodiment, a system for processing data includes a controller configured to: receive data read from a magnetic storage medium, apply a finite impulse response (FIR) filter to the data to obtain equalized data, and direct the equalized data through either a first FIR gain module or a second FIR gain module to control FIR gain of the equalized data, wherein the first FIR gain module is utilized when reading data in an asynchronous mode, and wherein the second FIR gain module is utilized when reading data in a synchronous mode and a FIR gain value of the second FIR gain module is automatically controlled. Other systems and methods for processing data using dynamic gain control with adaptive equalizers are presented according to more embodiments.Type: ApplicationFiled: July 17, 2014Publication date: January 21, 2016Inventors: Katherine T. Blinick, Robert A. Hutchins, Sedat Oelcer
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Patent number: 9236084Abstract: According to one embodiment, a system for processing data includes a controller configured to: receive data read from a magnetic storage medium, apply a finite impulse response (FIR) filter to the data to obtain equalized data, and direct the equalized data through either a first FIR gain module or a second FIR gain module to control FIR gain of the equalized data, wherein the first FIR gain module is utilized when reading data in an asynchronous mode, and wherein the second FIR gain module is utilized when reading data in a synchronous mode and a FIR gain value of the second FIR gain module is automatically controlled. Other systems and methods for processing data using dynamic gain control with adaptive equalizers are presented according to more embodiments.Type: GrantFiled: July 17, 2014Date of Patent: January 12, 2016Assignee: International Business Machines CorporationInventors: Katherine T. Blinick, Robert A. Hutchins, Sedat Oelcer
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Patent number: 9225360Abstract: In one embodiment, a computer program product for iterative read channel operation has program instructions embodied therewith that are executable by a controller to cause the controller to: in an iterative process until a maximum number of iterations has been reached or a valid codeword is produced: execute one or more digital front-end (DFE) functions on a plurality of signal samples employing the set of decisions provided by a decoder; execute a detection algorithm on the signal samples using a detector employing the set of decisions provided by the decoder to regenerate the set of decisions provided by a detector; execute a decoding algorithm of an error correcting code (ECC) using the set of decisions provided by the detector to regenerate the set of decisions provided by the decoder; and output decoding information relating to the signal samples when the decoding algorithm produces a valid codeword.Type: GrantFiled: January 20, 2015Date of Patent: December 29, 2015Assignee: GlobalFoundries Inc.Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Patent number: 9214187Abstract: According to one embodiment, a magnetic medium's readback signal samples are processed iteratively to provide a slip-resistant read channel by feeding the decoder output decisions back to the read channel front end where they are used to drive the decision-aided digital signal processing functions and control loops. Since data decisions provided by the decoder are typically more reliable than those provided by the detector, a significant performance improvement is obtained. A more reliable operation of the digital front-end signal processing functions in turn allows improvements to the reliability of the decoded data. Usage of Error Correcting Code (ECC) schemes that are soft decodable makes the read channel technique, described according to various embodiments herein, particularly efficient.Type: GrantFiled: May 31, 2013Date of Patent: December 15, 2015Assignee: International Business Machines CorporationInventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
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Patent number: 9202518Abstract: In one embodiment, a method includes executing a first forward loop of a detection algorithm on a block of signal samples during a first time interval, executing a first reverse loop of the detection algorithm on the block during a second time interval to produce first soft information, executing a decoding algorithm on the block during a third time interval using the first soft information to produce second soft information, executing a second forward loop of the detection algorithm on the block during a fourth time interval using the second soft information, executing a second reverse loop of the detection algorithm on the block during a fifth time interval to produce third soft information, executing the decoding algorithm on the block during a sixth time interval using the third soft information to produce a decoded block of signal samples, and outputting the decoded block of signal samples.Type: GrantFiled: February 7, 2013Date of Patent: December 1, 2015Assignee: GLOBALFOUNDRIES Inc.Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer