Abstract: A circuit can be used to a control the voltage of a voltage controlled oscillator (VCO) can include a first comparator, a second comparator, an accumulator, and an output device. The first comparator outputs a first pulse signal when the control voltage is higher than a high threshold voltage. The second comparator outputs a second pulse signal when the control voltage is lower than a low threshold voltage. The accumulator increases the value of a switch control signal if the first pulse signal is received or decreases the value of the switch control signal if the second pulse signal is received. The output device generates a compensation voltage to compensate the control voltage of the VCO depending on the value of the switch control signal.

Abstract: A frequency divider is disclosed herein. The frequency divider includes a first latch circuit and a second latch circuit coupled to the first latch circuit. Each of the first latch circuit and the second latch circuit includes a first level for generating a source current, a second level for receiving a pair of input signals and for generating a pair of output signals, and a third level for receiving the source current and a pair of clock signals. The second level is coupled between the first level and the third level. The first level includes a first transistor having a source terminal and a substrate both coupled to a source voltage. The third level includes a plurality of transistors controlled by the pair of clock signals. Each transistor in the third level has a source terminal and a substrate both coupled to ground.

Abstract: A variable gain amplifier (VGA) circuit and an automatic gain control (AGC) method thereof are disclosed. The VGA circuit includes an amplifier circuit and an AGC circuit. The amplifier circuit amplifies an input signal to an output signal according to a predetermined gain and the AGC circuit is connected to the amplifier circuit for regulating the predetermined gain. The AGC circuit further includes a peak detector detecting a peak of the output signal, a replica of the peak detector for detecting a peak of a reference signal, and a comparator for comparing the peak of the output signal with the peak of the reference signal to provide a control signal and then providing the control signal to the amplifier circuit to regulate the predetermined gain.

Abstract: An apparatus and method for operating a phase-locked loop circuit are disclosed. The phase locked loop circuit includes a plurality of resistive elements and a plurality of capacitive elements that are distributed in a charge pump, a loop filter and a voltage controlled oscillator. The plurality of resistive elements have a plurality of resistances that vary in proportion to each other. The plurality of capacitive elements have a plurality of capacitive elements that vary in proportion to each other. A damping factor of the phase-locked loop circuit is maintained substantially constant by the plurality of resistive elements and the plurality of capacitive elements.

Abstract: An analog to digital converter (ADC) with interference rejection capability and method thereof are disclosed. The ADC includes a threshold generator, a comparator circuit, a counter and an integrator. By comparing a signal with positive and negative threshold signals from the threshold generator, the comparator circuit converts the signal from analog to digital based on the result of the comparison. The counter counts a percentage of the digital signal and generates a bit signal based on the counted percentage. In response to the bit signal, the integrator supplies a control signal to the threshold generator to regulate the positive and negative threshold signals so as to maintain the counted percentage at a predetermined percentage threshold.

Abstract: A frequency divider is disclosed herein. The frequency divider includes a first latch circuit and a second latch circuit coupled to the first latch circuit. Each of the first latch circuit and the second latch circuit includes a first level for generating a source current, a second level for receiving a pair of input signals and for generating a pair of output signals, and a third level for receiving the source current and a pair of clock signals. The second level is coupled between the first level and the third level. The first level includes a first transistor having a source terminal and a substrate both coupled to a source voltage. The third level includes a plurality of transistors controlled by the pair of clock signals. Each transistor in the third level has a source terminal and a substrate both coupled to ground.

Abstract: A tunable band pass filter is provided. The tunable band pass filter includes a band pass filter and a plurality of switches coupled to the band pass filter. The band pass filter includes a plurality of transconductors and a plurality of capacitors. The tunable band pass filter can be configured as a complex band pass filter or as a tuning device for tuning the center frequency of the complex band pass filter depending on the operation of the plurality of switches. The tuning device includes at least one tuning integrator and a comparator. The tuning integrator includes at least one transconductor and a capacitor. The transconductor is selected via the plurality of switches from the plurality of transconductors and the capacitor is selected via the plurality of switches from said plurality of capacitors. The selected transconductor and the selected capacitor determinines the center frequency of the band pass filter.

Abstract: An apparatus and method for operating a phase-locked loop circuit are disclosed. The phase locked loop circuit includes a plurality of resistive elements and a plurality of capacitive elements that are distributed in a charge pump, a loop filter and a voltage controlled oscillator. The plurality of resistive elements have a plurality of resistances that vary in proportion to each other. The plurality of capacitive elements have a plurality of capacitive elements that vary in proportion to each other. A damping factor of the phase-locked loop circuit is maintained substantially constant by the plurality of resistive elements and the plurality of capacitive elements.

Abstract: A capacitor charging circuit comprises, power transfer circuitry, power switching control circuitry and voltage measurement circuitry. The power transfer circuitry transfers power from a power source to a capacitor. The power switching control circuitry controls the switching that causes power to be delivered to the power transfer circuitry. The voltage measurement circuitry indirectly measures the output voltage to determine when to stop charging the capacitor.

Abstract: A tunable band pass filter is provided. The tunable band pass filter includes a band pass filter and a plurality of switches coupled to the band pass filter. The band pass filter includes a plurality of transconductors and a plurality of capacitors. The tunable band pass filter can be configured as a complex band pass filter or as a tuning device for tuning the center frequency of the complex band pass filter depending on the operation of the plurality of switches. The tuning device includes at least one tuning integrator and a comparator. The tuning integrator includes at least one transconductor and a capacitor. The transconductor is selected via the plurality of switches from the plurality of transconductors and the capacitor is selected via the plurality of switches from said plurality of capacitors. The selected transconductor and the selected capacitor determinines the center frequency of the band pass filter.

Abstract: An analog to digital converter (ADC) with interference rejection capability and method thereof are disclosed. The ADC includes a threshold generator, a comparator circuit, a counter and an integrator. By comparing a signal with positive and negative threshold signals from the threshold generator, the comparator circuit converts the signal from analog to digital based on the result of the comparison. The counter counts a percentage of the digital signal and generates a bit signal based on the counted percentage. In response to the bit signal, the integrator supplies a control signal to the threshold generator to regulate the positive and negative threshold signals so as to maintain the counted percentage at a predetermined percentage threshold.

Abstract: An analog to digital converter (ADC) with interference rejection capability and method thereof are disclosed. The ADC includes a threshold generator, a comparator circuit, a counter and an integrator. By comparing a signal with positive and negative threshold signals from the threshold generator, the comparator circuit converts the signal from analog to digital based on the result of the comparison. The counter counts a percentage of the digital signal and generates a bit signal based on the counted percentage. In response to the bit signal, the integrator supplies a control signal to the threshold generator to regulate the positive and negative threshold signals so as to maintain the counted percentage at a predetermined percentage threshold.

Abstract: A variable gain amplifier (VGA) circuit and an automatic gain control (AGC) method thereof are disclosed. The VGA circuit includes an amplifier circuit and an AGC circuit. The amplifier circuit amplifies an input signal to an output signal according to a predetermined gain and the AGC circuit is connected to the amplifier circuit for regulating the predetermined gain. The AGC circuit further includes a peak detector detecting a peak of the output signal, a replica of the peak detector for detecting a peak of a reference signal, and a comparator for comparing the peak of the output signal with the peak of the reference signal to provide a control signal and then providing the control signal to the amplifier circuit to regulate the predetermined gain.

Abstract: A complex filter with automatic tuning capabilities for filtering a complex signal is disclosed. The complex filter includes a first lowpass filter, a second lowpass filter, a plurality of resistors, an integrator, a comparator, and a digital unit. The complex filter includes an imaginary component and a real component. The integrator, the comparator and the digital unit forms a tuning circuit. The tuning circuit can generate a plurality of control signals to tune the complex filter to a predetermined frequency. The tuning circuit can be turned off after a predetermined period.

Abstract: A capacitor charging circuit comprises, power transfer circuitry, power switching control circuitry and voltage measurement circuitry. The power transfer circuitry transfers power from a power source to a capacitor. The power switching control circuitry controls the switching that causes power to be delivered to the power transfer circuitry. The voltage measurement circuitry indirectly measures the output voltage to determine when to stop charging the capacitor.