Patents by Inventor Seetharam Narasimhan

Seetharam Narasimhan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Protection of intellectual property cores through a design flow
    Patent number: 8402401
    Abstract: One embodiment provides a method for protecting an integrated circuit chip design. The method can include storing in memory a circuit description of an integrated circuit core comprising a set of nodes and selecting a plurality of modification nodes from the set of nodes. A sequential structure can be inserted into the circuit description to provide a modified circuit description, the sequential structure utilizing the plurality of modification nodes as inputs. The modified circuit description can be stored in memory.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: March 19, 2013
    Assignee: Case Western University
    Inventors: Rajat Subhra Chakraborty, Seetharam Narasimhan, Swarup Bhunia
  • PROTECTION OF INTELLECTUAL PROPERTY (IP) CORES THROUGH A DESIGN FLOW
    Publication number: 20110113392
    Abstract: One embodiment provides a method for protecting an integrated circuit chip design. The method can include storing in memory a circuit description of an integrated circuit core comprising a set of nodes and selecting a plurality of modification nodes from the set of nodes. A sequential structure can be inserted into the circuit description to provide a modified circuit description, the sequential structure utilizing the plurality of modification nodes as inputs. The modified circuit description can be stored in memory.
    Type: Application
    Filed: November 9, 2010
    Publication date: May 12, 2011
    Inventors: RAJAT SUBHRA CHAKRABORTY, Seetharam Narasimhan, Swarup Bhunia