Patents by Inventor Seiichi Abe

Seiichi Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8578110
    Abstract: A memory data backup system capable of shortening time required to back up data from a volatile memory to a nonvolatile memory is provided. A nonvolatile memory module 100 is mounted on the same bus 102 as a bus where an interface between a memory controller 52A and a volatile memory module 52 exists.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: November 5, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuhiko Fukazawa, Seiichi Abe
  • Publication number: 20120089796
    Abstract: A memory data backup system capable of shortening time required to back up data from a volatile memory to a nonvolatile memory is provided. A nonvolatile memory module 100 is mounted on the same bus 102 as a bus where an interface between a memory controller 52A and a volatile memory module 52 exists.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 12, 2012
    Applicant: HITACHI, LTD.
    Inventors: Tatsuhiko Fukazawa, Seiichi Abe
  • Patent number: 7493432
    Abstract: A storage system with excellent failure tolerance is provided. The storage system has redundant controllers. A first controller has a first memory for storing the data read/written from/to a storage device and control information concerning the reading/writing of data in the storage device. A second controller has a second memory for storing the data read/written from/to the storage device and control information concerning the reading/writing of data in the storage device. The first memory is structured so that it can be accessed from the second controller. The second memory is structured so that it can be accessed from the first controller.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: February 17, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuhiko Fukazawa, Seiichi Abe
  • Publication number: 20080147932
    Abstract: A storage system with excellent failure tolerance is provided. The storage system has redundant controllers. A first controller has a first memory for storing the data read/written from/to a storage device and control information concerning the reading/writing of data in the storage device. A second controller has a second memory for storing the data read/written from/to the storage device and control information concerning the reading/writing of data in the storage device. The first memory is structured so that it can be accessed from the second controller. The second memory is structured so that it can be accessed from the first controller.
    Type: Application
    Filed: November 28, 2006
    Publication date: June 19, 2008
    Inventors: Tatsuhiko Fukazawa, Seiichi Abe
  • Patent number: 7260680
    Abstract: There is provided a storage apparatus, which can continue processes to a host without making it recognize any soft errors as failure even if the errors occur in its microprocessor. The storage apparatus comprises: a plurality of host interface control circuits controlling data transfer with a host; a disk interface control circuit controlling data transfer with a physical memory device; a cache memory board storing the data temporarily; and a switch board connecting the host interface control circuits, disk interface control circuit, and cache memory board, wherein each of the host interface control circuits has two or more CPUs and when a soft error occurs in the CPU, data transfer process with the host is inherited to the CPU in which no soft error occurs, so that a reset process to the CPU in which the soft error has occurred is carried out.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: August 21, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Seiichi Abe
  • Patent number: 7249290
    Abstract: A deskew circuit includes, for clock and every bit of data, a variable delay circuit between a receiver that receives data and a flip-flop that first latches the data, in which a detecting pattern to detect a stable region for receiving data is repeatedly sent before implementing a data transfer, a delay value with which the starting edge an ending edge of the data match the rising edge of the clock is found for the variable delay circuit, and a delay value with which the transfer data can be received in a stable manner is set based on the delay value of the variable delay circuit.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: July 24, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Yuji Takei, Seiichi Abe
  • Patent number: 7131013
    Abstract: A computing section controls a hot swap circuit, and DC/DC converters based on binary data from an ADC and an interrupt signal from respective comparing sections of a voltage detecting circuit. If the interrupt signal is input from any one of the respective comparing sections, the reading of binary data corresponding to the interrupt signal is halted. The binary data relating to the voltage detecting section corresponding to the interrupt signal, which is held in the SRAM at that time, is transferred to a non-volatile memory, where it is stored. When driving of the system has been halted, binary data is read out from the non-volatile memory, in order to analyze the cause of the error in a DC/DC converter which indicates an error output voltage from one of power supply circuits for supplying externally a plurality of different drive voltages to loads in a disk array unit.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: October 31, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Takahiro Sasakura, Seiichi Abe
  • Publication number: 20060075186
    Abstract: There is provided a storage apparatus, which can continue processes to a host without making it recognize any soft errors as failure even if the errors occur in its microprocessor. The storage apparatus comprises: a plurality of host interface control circuits controlling data transfer with a host; a disk interface control circuit controlling data transfer with a physical memory device; a cache memory board storing the data temporarily; and a switch board connecting the host interface control circuits, disk interface control circuit, and cache memory board, wherein each of the host interface control circuits has two or more CPUs and when a soft error occurs in the CPU, data transfer process with the host is inherited to the CPU in which no soft error occurs, so that a reset process to the CPU in which the soft error has occurred is carried out.
    Type: Application
    Filed: November 23, 2004
    Publication date: April 6, 2006
    Inventor: Seiichi Abe
  • Publication number: 20060036915
    Abstract: A deskew circuit includes, for clock and every bit of data, a variable delay circuit between a receiver that receives data and a flip-flop that first latches the data, in which a detecting pattern to detect a stable region for receiving data is repeatedly sent before implementing a data transfer, a delay value with which the starting edge an ending edge of the data match the rising edge of the clock is found for the variable delay circuit, and a delay value with which the transfer data can be received in a stable manner is set based on the delay value of the variable delay circuit.
    Type: Application
    Filed: October 6, 2005
    Publication date: February 16, 2006
    Inventors: Yuji Takei, Seiichi Abe
  • Patent number: 6978403
    Abstract: A deskew circuit includes, for clock and every bit of data, a variable delay circuit between a receiver that receives data and a flip-flop that first latches the data, in which a detecting pattern to detect a stable region for receiving data is repeatedly sent before implementing a data transfer, a delay value with which the starting edge and ending edge of the data match the rising edge of the clock is found for the variable delay circuit, and a delay value with which the transfer data can be received in a stable manner is set based on the delay value of the variable delay circuit.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: December 20, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Yuji Takei, Seiichi Abe
  • Publication number: 20050240814
    Abstract: A computing section controls a hot swap circuit, and DC/DC converters based on binary data from an ADC and an interrupt signal from respective comparing sections of a voltage detecting circuit. If the interrupt signal is input from any one of the respective comparing sections, the reading of binary data corresponding to the interrupt signal is halted. The binary data relating to the voltage detecting section corresponding to the interrupt signal, which is held in the SRAM at that time, is transferred to a non-volatile memory, where it is stored. When driving of the system has been halted, binary data is read out from the non-volatile memory, in order to analyze the cause of the error in a DC/DC converter which indicates an error output voltage from one of power supply circuits for supplying externally a plurality of different drive voltages to loads in a disk array unit.
    Type: Application
    Filed: June 21, 2004
    Publication date: October 27, 2005
    Inventors: Takahiro Sasakura, Seiichi Abe
  • Patent number: 6777795
    Abstract: In the past, a power supply distance between a power source and an LSI package could not be shortened and power supply variations could easily produce an adverse effect. To reduce the power supply distance between the LSI and power supply module the power supply module is mounted on an upper surface of the LSI package. As a result, the power source noise can be reduced, the efficiency and response rate of the power source unit are high, and the generated electromagnetic field can be reduced. Moreover, since each LSI package has a power supply module required therefore, the number of required power source types (voltage types) on the substrate with the package mounted thereon can be decreased. As a result, the mounting efficiency can be increased and the substrate can be manufactured at a low cost.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: August 17, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Takahiro Sasakura, Seiichi Abe
  • Publication number: 20040068682
    Abstract: A deskew circuit includes, for clock and every bit of data, a variable delay circuit between a receiver that receives data and a flip-flop that first latches the data, in which a detecting pattern to detect a stable region for receiving data is repeatedly sent before implementing a data transfer, a delay value with which the starting edge and ending edge of the data match the rising edge of the clock is found for the variable delay circuit, and a delay value with which the transfer data can be received in a stable manner is set based on the delay value of the variable delay circuit.
    Type: Application
    Filed: May 8, 2003
    Publication date: April 8, 2004
    Applicant: HITACHI, LTD.
    Inventors: Yuji Takei, Seiichi Abe
  • Patent number: 6700829
    Abstract: A memory package for storing data and capable of being added to or replaced while being provided with a battery backup in computer systems which can be mounted with a plurality of said memory packages. A memory package also has a function to reduce power consumption of the battery backup to a minimum, when the memory package with battery backup is inserted into the computer system without the main power being applied. Consequently, even if additional memory packages are inserted which require battery backups, only a weak current need be supplied from the backup power supply so that the battery will not run down after a short time. The memory packages can therefore be added and replaced while still storing data internally and the memory capacity can be changed. Also, a memory system is provided including a power supply supplying power supply lines connected to the memory packages. Diode and/or surge protection arrangements are also provided to facilitate hot line insertion and removal.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: March 2, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Seiichi Abe, Hirotsugu Yamagata, Kazunari Kano
  • Patent number: 6568763
    Abstract: A system for controlling an operation of a cylinder comprises: a hoist cylinder displacing a member to be driven such as vessel of a dump truck in a vertical direction; a directional control valve for switching the cylinder so as to take a first position performing an expansion motion of the hoist cylinder and a second position performing a contraction motion thereof; an electromagnetic proportional pressure control valve for throttling a meter-out area at a time when the directional control valve takes the second position; a potentiometer for outputting a signal in response to the vertical displacement of the vessel; and a controller. When the controller detects that the vessel is just before the descending end position, the controller controls to reduce the output pressure as optimum current from the electromagnetic proportional pressure control valve to thereby make slow the descending speed by throttling the meter-out area of a hoist valve of the hoist cylinder.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: May 27, 2003
    Assignee: Komatsu Ltd.
    Inventors: Koji Uematsu, Seiichi Abe
  • Publication number: 20030093605
    Abstract: A memory package for storing data and capable of being added to or replaced while being provided with a battery backup in computer systems which can be mounted with a plurality of said memory packages. A memory package also has a function to reduce power consumption of the battery backup to a minimum, when the memory package with battery backup is inserted into the computer system without the main power being applied. Consequently, even if additional memory packages are inserted which require battery backups, only a weak current need be supplied from the backup power supply so that the battery will not run down after a short time. The memory packages can therefore be added and replaced while still storing data internally and the memory capacity can be changed. Also, a memory system is provided including a power supply supplying power supply lines connected to the memory packages. Diode and/or surge protection arrangements are also provided to facilitate hot line insertion and removal.
    Type: Application
    Filed: April 23, 2002
    Publication date: May 15, 2003
    Inventors: Seiichi Abe, Hirotsugu Yamagata, Kazunari Kano
  • Publication number: 20030047800
    Abstract: In the past, a power supply distance between a power source and an LSI package could not be shortened and power supply variations could easily produce an adverse effect.
    Type: Application
    Filed: February 20, 2002
    Publication date: March 13, 2003
    Inventors: Takahiro Sasakura, Seiichi Abe
  • Publication number: 20030021991
    Abstract: Waste plastics including solid plastics, thin plastics, and foamy plastics are fed into a ring die of an extrusion molding machine. The waste plastics are either semi-melted or melted, and are then extruded onto an outer circumferential surface the ring die through die cavities. Thus, granular plastic moldings are extruded onto the outer circumferential surface of the ring die through the die cavities, and are then cut or scraped from the outer circumferential surface of the ring die. The pellets have a melt-solidified surface, and have a strength sufficient to reach a predetermine zone in a raceway of a furnace and a grain diameter sufficient to be fed at a velocity higher than a limiting velocity thereof during injection to the furnace.
    Type: Application
    Filed: April 25, 2002
    Publication date: January 30, 2003
    Inventors: Tetsuro Sugayoshi, Koichi Tomioka, Hiroki Ishiguro, Yoji Ogaki, Hideo Nakamura, Takeshi Konishi, Kaneo Terada, Kenichi Nemoto, Shinichi Wakamatsu, Hiroshi Nakatani, Yasuaki Oyanagi, Genji Kanatani, Minoru Asanuma, Ichiro Tohma, Seiichi Abe
  • Patent number: 6385114
    Abstract: A memory package for storing data and capable of being added to or replaced while being provided with a battery backup in computer systems which can be mounted with a plurality of said memory packages. A memory package also has a function to reduce power consumption of the battery backup to a minimum, when the memory package with battery backup is inserted into the computer system without the main power being applied. Consequently, even if additional memory packages are inserted in computer systems installable with memory packages having battery backups, only a weak current need be supplied from the backup power supply so that the battery will not run down after a short time. The memory packages can therefore be added and replaced while still storing data internally and the memory capacity can be changed. Also, a memory system is provided including a power supply supplying power supply lines connected to the memory packages.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: May 7, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Seiichi Abe, Hirotsugu Yamagata, Kazunari Kano
  • Publication number: 20020047300
    Abstract: A system for controlling an operation of a cylinder comprises: a hoist cylinder displacing a member to be driven such as vessel of a dump truck in a vertical direction; a directional control valve for switching the cylinder so as to take a first position performing an expansion motion of the hoist cylinder and a second position performing a contraction motion thereof; an electromagnetic proportional pressure control valve for throttling a meter-out area at a time when the directional control valve takes the second position; a potentiometer for outputting a signal in response to the vertical displacement of the vessel; and a controller. When the controller detects that the vessel is just before the descending end position, the controller controls to reduce the output pressure as optimum current from the electromagnetic proportional pressure control valve to thereby make slow the descending speed by throttling the meter-out area of a hoist valve of the hoist cylinder.
    Type: Application
    Filed: September 7, 2001
    Publication date: April 25, 2002
    Applicant: KOMATSU LTD.
    Inventors: Koji Uematsu, Seiichi Abe