Patents by Inventor Seiichi GOYA

Seiichi GOYA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10601411
    Abstract: A comparator includes a differential pair circuit comprising NMOS transistors, the differential pair circuit configured to output a signal corresponding to a difference between first and second input signals supplied thereto, and an input circuit configured to raise a voltage level of the first input signal supplied to the differential pair circuit when the voltage of the first input signal is less than a predetermined threshold value.
    Type: Grant
    Filed: September 3, 2017
    Date of Patent: March 24, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Seiichi Goya, Hideaki Uchida, Norihiro Ueda
  • Publication number: 20180226960
    Abstract: A comparator includes a differential pair circuit comprising NMOS transistors, the differential pair circuit configured to output a signal corresponding to a difference between first and second input signals supplied thereto, and an input circuit configured to raise a voltage level of the first input signal supplied to the differential pair circuit when the voltage of the first input signal is less than a predetermined threshold value.
    Type: Application
    Filed: September 3, 2017
    Publication date: August 9, 2018
    Inventors: Seiichi GOYA, Hideaki UCHIDA, Norihiro UEDA