Patents by Inventor Seiichi Miyazaki
Seiichi Miyazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10461535Abstract: A power management system includes a first administrator, a second administrator, a first estimator, a second estimator and a determiner. The first administrator manages a residual capacity of a power storage apparatus. The second administrator manages interruption information regarding a power grid. The first estimator estimates, as first power information, an amount of power that is consumed by an electric load during an interruption period. The second estimator estimates an estimation residual capacity that is the residual capacity at an end point of the interruption period, based on the first power information. The determiner determines that a condition for participating in a power trade market is met, when the estimation residual capacity exceeds a reference value.Type: GrantFiled: September 18, 2014Date of Patent: October 29, 2019Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yoshihiko Tokunaga, Seiichi Miyazaki, Naohiro Fukuda, Hiroyuki Kuriyama, Norimasa Ota
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Patent number: 10453154Abstract: The power adjustment system includes a first estimator, a second estimator, a calculator, a controller, and a determiner. The first estimator estimates power to be consumed by an electric load during an interested period. The second estimator estimates power obtainable from a power supply apparatus during the interested period. The calculator determines a profit in the interested period by calculating a difference between income and a cost. The controller selects one of a first state of supplying power from a power storage apparatus to a power grid and a second state of supplying power from the power storage apparatus to the electric load. The determiner provides an instruction to the controller so as to maximize the profit in the interested period.Type: GrantFiled: July 31, 2014Date of Patent: October 22, 2019Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Yoshihiko Tokunaga, Seiichi Miyazaki, Naohiro Fukuda, Hiroyuki Kuriyama, Norimasa Ota
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Patent number: 10365677Abstract: A power management system includes a receiver, an estimator, an administrator and a determiner. The receiver acquires DR information that includes a reduction value and a target period for requesting a reduction of received power. The estimator estimates, as first power information, power that is consumed by an electric load during the target period. The administrator manages, as second power information, power that can be output from a power supplying apparatus including a power storage apparatus. The determiner determines that a condition for participating in a power trade market is met, when determining that the reduction value is achievable during the target period, based on the first power information and the second power information.Type: GrantFiled: September 18, 2014Date of Patent: July 30, 2019Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yoshihiko Tokunaga, Seiichi Miyazaki, Naohiro Fukuda, Hiroyuki Kuriyama, Norimasa Ota
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Patent number: 10339602Abstract: A first estimator estimates first power to be generated by a photovoltaic power generation apparatus during an interested period. A second estimator estimates second power to be consumed by an electric load during the interested period. A power purchasing cost calculator calculates, when there is a shortfall in the first power compared to the second power, a cost to be paid for receiving, from a power grid, power for compensating for the shortfall. A determiner compares an amount of money to be paid to a customer facility in accordance with a trading term when power is supplied from the power storage apparatus to the power grid, with the cost calculated by the power purchasing cost calculator. A controller causes the power storage apparatus to the electric load when the cost to be paid to the customer facility is equal to or less than the cost.Type: GrantFiled: July 31, 2014Date of Patent: July 2, 2019Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Yoshihiko Tokunaga, Seiichi Miyazaki, Naohiro Fukuda, Hiroyuki Kuriyama, Norimasa Ota
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Publication number: 20160241034Abstract: A power management system includes a first administrator, a second administrator, a first estimator, a second estimator and a determiner. The first administrator manages a residual capacity of a power storage apparatus. The second administrator manages interruption information regarding a power grid. The first estimator estimates, as first power information, an amount of power that is consumed by an electric load during an interruption period. The second estimator estimates an estimation residual capacity that is the residual capacity at an end point of the interruption period, based on the first power information. The determiner determines that a condition for participating in a power trade market is met, when the estimation residual capacity exceeds a reference value.Type: ApplicationFiled: September 18, 2014Publication date: August 18, 2016Inventors: Yoshihiko TOKUNAGA, Seiichi MIYAZAKI, Naohiro FUKUDA, Hiroyuki KURIYAMA, Norimasa OTA
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Publication number: 20160216722Abstract: A power management system includes a receiver, an estimator, an administrator and a determiner. The receiver acquires DR information that includes a reduction value and a target period for requesting a reduction of received power. The estimator estimates, as first power information, power that is consumed by an electric load during the target period. The administrator manages, as second power information, power that can be output from a power supplying apparatus including a power storage apparatus. The determiner determines that a condition for participating in a power trade market is met, when determining that the reduction value is achievable during the target period, based on the first power information and the second power information.Type: ApplicationFiled: September 18, 2014Publication date: July 28, 2016Inventors: Yoshihiko TOKUNAGA, Seiichi MIYAZAKI, Naohiro FUKUDA, Hiroyuki KURIYAMA, Norimasa OTA
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Publication number: 20160196622Abstract: A prediction unit predicts electric power consumed by an electric load. When the electric power predicted by the prediction unit exceeds a limit value that is set to a building of a consumer, a calculation unit calculates an excess charge to be paid in addition to a price for electric power received by the building. A transaction participating unit is configured to perform an application to a transaction device when the amount of money that the consumer receives exceeds the excess charge while a first state, in which electric power from a power supply facility is supplied to a power system, is selected. A controller is configured to select the first state when the contract is concluded. The controller is configured to select a second state so that the electric power from the electric power system does not exceed the limit value unless a contract is conclude.Type: ApplicationFiled: August 4, 2014Publication date: July 7, 2016Inventors: Yoshihiko TOKUNAGA, Seiichi MIYAZAKI, Naohiro FUKUDA, Hiroyuki KURIYAMA, Norimasa OTA
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Publication number: 20160196621Abstract: The power adjustment system includes a first estimator, a second estimator, a calculator, a controller, and a determiner. The first estimator estimates power to be consumed by an electric load during an interested period. The second estimator estimates power obtainable from a power supply apparatus during the interested period. The calculator determines a profit in the interested period by calculating a difference between income and a cost. The controller selects one of a first state of supplying power from a power storage apparatus to a power grid and a second state of supplying power from the power storage apparatus to the electric load. The determiner provides an instruction to the controller so as to maximize the profit in the interested period.Type: ApplicationFiled: July 31, 2014Publication date: July 7, 2016Inventors: Yoshihiko TOKUNAGA, Seiichi MIYAZAKI, Naohiro FUKUDA, Hiroyuki KURIYAMA, Norimasa OTA
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Publication number: 20160189298Abstract: A first estimator estimates first power to be generated by a photovoltaic power generation apparatus during an interested period. A second estimator estimates second power to be consumed by an electric load during the interested period. A power purchasing cost calculator calculates, when there is a shortfall in the first power compared to the second power, a cost to be paid for receiving, from a power grid, power for compensating for the shortfall. A determiner compares an amount of money to be paid to a customer facility in accordance with a trading term when power is supplied from the power storage apparatus to the power grid, with the cost calculated by the power purchasing cost calculator. A controller causes the power storage apparatus to the electric load when the cost to be paid to the customer facility is equal to or less than the cost.Type: ApplicationFiled: July 31, 2014Publication date: June 30, 2016Inventors: Yoshihiko TOKUNAGA, Seiichi MIYAZAKI, Naohiro FUKUDA, Hiroyuki KURIYAMA, Norimasa OTA
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Patent number: 8653518Abstract: A semiconductor device has a floating gate structure in which charge storage layers are stacked on a SiO2 layer formed on a substrate made of n-type Si. The charge storage layer has quantum dots made of undoped Si and an oxide layer that covers the quantum dots. The charge storage layer has quantum dots made of n+-Si and an oxide layer that covers the quantum dots. Electrons originally existing in the quantum dots migrate between the quantum dots and the quantum dots via tunnel junction and are distributed in the quantum dots and/or the quantum dots according to the voltage applied to a gate electrode via pads. The distribution is detected in the form of a current (ISD).Type: GrantFiled: December 6, 2007Date of Patent: February 18, 2014Assignee: Hiroshima UniversityInventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi, Hideki Murakami
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Patent number: 7898020Abstract: A semiconductor memory includes a composite floating structure where an insulation film is formed on a semiconductor substrate, Si-based quantum dots covered with an extremely thin Si oxide film is formed on the insulation film, silicide quantum dots covered with a high dielectric insulation film are formed on the extremely thin Si oxide film, and Si-based quantum dots covered with a high dielectric insulation film are formed on the high dielectric insulation film. Multivalued memory operations can be conducted at a high speed and with stability by applying a certain positive voltage to a gate electrode to accumulate electrons in the silicide quantum dots and by applying a certain negative voltage and weak light to the gate electrode to emit the electrons from the silicide quantum dots.Type: GrantFiled: December 6, 2007Date of Patent: March 1, 2011Assignee: Hiroshima UniversityInventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
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Publication number: 20100308328Abstract: A semiconductor device has a floating gate structure in which charge storage layers are stacked on a SiO2 layer formed on a substrate made of n-type Si. The charge storage layer has quantum dots made of undoped Si and an oxide layer that covers the quantum dots. The charge storage layer has quantum dots made of n+-Si and an oxide layer that covers the quantum dots. Electrons originally existing in the quantum dots migrate between the quantum dots and the quantum dots via tunnel junction and are distributed in the quantum dots and/or the quantum dots according to the voltage applied to a gate electrode via pads. The distribution is detected in the form of a current (ISD).Type: ApplicationFiled: December 6, 2007Publication date: December 9, 2010Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi, Hideki Murakami
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Patent number: 7829935Abstract: A semiconductor memory has a composite floating structure in which quantum dots composed of Si and coated with a Si oxide thin film are deposited on an insulating film formed on a semiconductor substrate, quantum dots coated with a high-dielectric insulating film are deposited on the quantum dots, and quantum dots composed of Si and coated with a high-dielectric insulating film are further deposited. Each of the quantum dots includes a core layer and a clad layer which covers the core layer. The electron occupied level in the core layer is lower than that in the clad layer.Type: GrantFiled: March 26, 2008Date of Patent: November 9, 2010Assignee: Hiroshima UniversityInventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
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Patent number: 7812621Abstract: A measuring unit applies a dc voltage causing an inversion layer to be formed on an interface between a semiconductor substrate and an insulating film to the semiconductor substrate while changing a change speed of a level of the dc voltage, and measures a current flowing through the insulating film. An arithmetic unit obtains a straight line showing a relationship between the current flowing through the insulating film and the change speed of the dc voltage on the basis of a relationship between the current measured by the measuring unit and the dc voltage, and calculates a slope of the obtained straight line as surface capacitance of the insulating film. The arithmetic unit calculates permittivity of the insulating film on the basis of the calculated surface capacitance, an area of contact between a probe and the insulating film and a thickness of the insulating film.Type: GrantFiled: July 31, 2008Date of Patent: October 12, 2010Assignee: Hiroshima UniversityInventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
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Patent number: 7768032Abstract: A light-emitting device comprises first and second dot members. The first dot member is formed so that it makes contact with the second dot member. The first dot member comprises a plurality of first quantum dot layers. Each of the plurality of first quantum dot layers comprises a plurality of first quantum dots and a silicon dioxide film. The first quantum dot comprises an n-type silicon dot. The second dot member comprises a plurality of second quantum dot layers. Each of the plurality of second quantum dot layers comprises a plurality of second quantum dots and a silicon dioxide film. The second quantum dot comprises a p-type silicon dot.Type: GrantFiled: September 17, 2008Date of Patent: August 3, 2010Assignee: Hiroshima UniversityInventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
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Publication number: 20100176824Abstract: A measuring unit applies a dc voltage causing an inversion layer to be formed on an interface between a semiconductor substrate and an insulating film to the semiconductor substrate while changing a change speed of a level of the dc voltage, and measures a current flowing through the insulating film. An arithmetic unit obtains a straight line showing a relationship between the current flowing through the insulating film and the change speed of the dc voltage on the basis of a relationship between the current measured by the measuring unit and the dc voltage, and calculates a slope of the obtained straight line as surface capacitance of the insulating film. The arithmetic unit calculates permittivity of the insulating film on the basis of the calculated surface capacitance, an area of contact between a probe and the insulating film and a thickness of the insulating film.Type: ApplicationFiled: July 31, 2008Publication date: July 15, 2010Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
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Publication number: 20100155808Abstract: A semiconductor memory has a composite floating structure in which quantum dots composed of Si and coated with a Si oxide thin film are deposited on an insulating film formed on a semiconductor substrate, quantum dots coated with a high-dielectric insulating film are deposited on the quantum dots, and quantum dots composed of Si and coated with a high-dielectric insulating film are further deposited. Each of the quantum dots includes a core layer and a clad layer which covers the core layer. The electron occupied level in the core layer is lower than that in the clad layer.Type: ApplicationFiled: March 26, 2008Publication date: June 24, 2010Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
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Publication number: 20100140683Abstract: Provided is a silicon nitride film which has an excellent charge storage capacity and thus is useful as a charge storage layer of a semiconductor memory device. The silicon nitride film having substantially uniform trap density in the film thickness direction has high charge storage performance. The silicon nitride film is formed by plasma CVD by using a plasma processing apparatus (100), wherein microwaves are introduced into a chamber (1) by a plane antenna having a plurality of holes, plasma is generated by the microwaves while a source gas including nitrogen-containing compound and silicon-containing compound is introduced into the chamber (1), and the silicon nitride film is deposited on the surface of a processing object by the plasma.Type: ApplicationFiled: March 26, 2008Publication date: June 10, 2010Applicants: TOKYO ELECTRON LIMITED, HIROSHIMA UNIVERSITYInventors: Seiichi Miyazaki, Masayuki Kohno, Tatsuo Nishita, Toshio Nakanishi, Yoshihiro Hirota
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Publication number: 20100006921Abstract: A semiconductor memory includes a composite floating structure where an insulation film is formed on a semiconductor substrate, Si-based quantum dots covered with an extremely thin Si oxide film is formed on the insulation film, silicide quantum dots covered with a high dielectric insulation film are formed on the extremely thin Si oxide film, and Si-based quantum dots covered with a high dielectric insulation film are formed on the high dielectric insulation film. Multivalued memory operations can be conducted at a high speed and with stability by applying a certain positive voltage to a gate electrode to accumulate electrons in the silicide quantum dots and by applying a certain negative voltage and weak light to the gate electrode to emit the electrons from the silicide quantum dots.Type: ApplicationFiled: December 6, 2007Publication date: January 14, 2010Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi
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Publication number: 20090236584Abstract: A light-emitting device comprises first and second dot members. The first dot member is formed so that it makes contact with the second dot member. The first dot member comprises a plurality of first quantum dot layers. Each of the plurality of first quantum dot layers comprises a plurality of first quantum dots and a silicon dioxide film. The first quantum dot comprises an n-type silicon dot. The second dot member comprises a plurality of second quantum dot layers. Each of the plurality of second quantum dot layers comprises a plurality of second quantum dots and a silicon dioxide film. The second quantum dot comprises a p-type silicon dot.Type: ApplicationFiled: September 17, 2008Publication date: September 24, 2009Inventors: Katsunori Makihara, Seiichi Miyazaki, Seiichiro Higashi