Patents by Inventor Seiichi Noda

Seiichi Noda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240090203
    Abstract: A semiconductor storage device includes a first oxide semiconductor layer that extends in a first direction; a second oxide semiconductor layer that extends in the first direction and is adjacent to the first oxide semiconductor layer in a second direction intersecting to the first direction; first wiring that extends in a third direction intersecting to the first direction and overlaps with the first oxide semiconductor layer in the third direction; second wiring that extends in the third direction and overlaps with the second oxide semiconductor layer in the third direction; a first insulating film that is provided between the first wiring and the first oxide semiconductor layer; a second insulating film that is provided between the second wiring and the second oxide semiconductor layer; a first conductor that is provided on the first oxide semiconductor layer; a second conductor that is provided on the second oxide semiconductor layer; and an insulating layer that has a gap between the first conductor and
    Type: Application
    Filed: August 25, 2023
    Publication date: March 14, 2024
    Applicant: Kioxia Corporation
    Inventors: Takanori AKITA, Kotaro NODA, Seiichi URAKAWA, Mutsumi OKAJIMA
  • Patent number: 8607817
    Abstract: A control method of a filled water volume in a fluid space requiring a water filling test is disclosed. The method includes disposing a pipe in the fluid space and enclosing the pipe with an enclosure, detecting pressure of a water filled portion in the fluid space or outside of the enclosure, and controlling the volumes of filling fluid and water to a water filling portion in the fluid space inside and outside the enclosure based on the detected pressure such that the pressure in the enclosure becomes higher than the pressure at the water filling part in the fluid space outside the enclosure.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: December 17, 2013
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Ken Nakayama, Seiichi Noda, Yoshimichi Kawakami
  • Patent number: 8229022
    Abstract: The present invention relates to a modulation and demodulation method of minimizing an error rate and applying it to a differential operation modulo 4. A modulation apparatus includes a Gray coding circuit 101 to which data of (2n+1) bits are inputted (where “n” is an integer more than 1) and which encodes 2 bits of an input signal of (2n+1) bits to a Gray code as a signal for allowing four quadrants to be identified, an encoding circuit 102 that encodes 3 bits of the input signal of (2n+1) bits as a signal indicating any one of eight subgroups provided in each of the four quadrants so that an average Hamming distance between adjacent subgroups within its quadrant becomes a minimum, and a mapping circuit 104 that maps binary data encoded by the Gray coding circuit 101 and the encoding circuit 102 on the four quadrants.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: July 24, 2012
    Assignee: NEC Corporation
    Inventors: Seiichi Noda, Eisaku Sasaki
  • Publication number: 20100206052
    Abstract: There are provided a control method and a device of a filled water volume in a fluid space through which the fluid space can be filled with water while preventing a pipe in the fluid space from making contact with the filling water by controlling the filled water by controlling the filled water volume. The control method of a filled water volume in a fluid space requiring a water filling test includes disposing a pipe in the fluid space and enclosing the pipe with an enclosure, detecting pressure of a water filled portion in the fluid space or outside of the enclosure; and controlling, based on the detected pressure, the volumes of filling fluid and water to a water filling portion in the fluid space inside and outside the enclosure, such that the pressure in the enclosure becomes higher than the pressure at the water filling part in the fluid space outside the enclosure.
    Type: Application
    Filed: October 18, 2007
    Publication date: August 19, 2010
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Ken Nakayama, Seiichi Noda, Yoshimichi Kawakami
  • Patent number: 7649956
    Abstract: A modulation and demodulation system capable of minimizing a bit error rate in a six-phase phase modulation method. A senary signal phase-modulated and outputted by a modulator is received and phase-modulated by a destination demodulator to a binary signal before conversion by the modulator. The modulator assigns (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) which are senary signals (bi, ti) to first to sixth phases respectively. The demodulator performs a conversion process from the senary signals to the binary signals, for instance, by storing transmitted senary signals and sequentially converting every senary signal of length m to binary signal of length b so as to output them. The process of the demodulator assigns the first to sixth phases as the senary signals (bi, ti) to (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) respectively.
    Type: Grant
    Filed: October 21, 2005
    Date of Patent: January 19, 2010
    Assignee: NEC Corporation
    Inventors: Seiichi Noda, Shinichi Koike
  • Patent number: 7630453
    Abstract: Disclosed is a method and a system for performing N-ary modulation in which bit errors may be reduced against symbol error. A binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 12 and sequentially doubled, that is, any one of 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 7, 9, 11, 13, . . . , the number N is 12, 24, 48, 96, . . . , respectively, two out of the n bits are allocated for identifying four quadrants of the first phase plane, two out of the remaining (n?2) bits are allocated for identifying four quadrants of the second phase plane. The binary signal of three out of the n bits is converted into two digits of ternary signals (T1, T2). The ternary signals are mapped to the first and second phase planes with rotational symmetry of 90° or with axial symmetry.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: December 8, 2009
    Assignee: NEC Corporation
    Inventor: Seiichi Noda
  • Publication number: 20090168917
    Abstract: The present invention relates to a modulation and demodulation method of minimizing an error rate and applying it to a differential operation modulo 4. A modulation apparatus includes a Gray coding circuit 101 to which data of (2n+1) bits are inputted (where “n” is an integer more than 1) and which encodes 2 bits of an input signal of (2n+1) bits to a Gray code as a signal for allowing four quadrants to be identified, an encoding circuit 102 that encodes 3 bits of the input signal of (2n+1) bits as a signal indicating any one of eight subgroups provided in each of the four quadrants so that an average Hamming distance between adjacent subgroups within its quadrant becomes a minimum, and a mapping circuit 104 that maps binary data encoded by the Gray coding circuit 101 and the encoding circuit 102 on the four quadrants.
    Type: Application
    Filed: October 20, 2006
    Publication date: July 2, 2009
    Inventors: Seiichi Noda, Eisaku Sasaki
  • Patent number: 7330451
    Abstract: Disclosed is a CDMA communication system and method that make it possible to accommodate a greater number of user terminals that can be connected per facilities investment. Ternary phase-shift keying (TPSK) modulation is applied as primary modulation in a CDMA communication system. It is possible to deliver far performance in which the Eb/No ratio is improved by about 0.75 dB, in comparison with BPSK and QPSK modulation, in order to obtain the required signal quality. Accordingly, the number of user terminals that can be connected simultaneously in a CDMA system can be increased by about 19%.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: February 12, 2008
    Assignee: NEC Corporation
    Inventor: Seiichi Noda
  • Patent number: 7230994
    Abstract: In a QAM modulation system, (3p+1) or (3p+2) input signal strings, where p is an integer not less than 3 or 2, are converted into three (p+1) string signals which are then allocated to three phase planes. The converted three (p+1) string signals are time-division multiplexed and multi-level modulated to realize QAM modulation in which the n-ary number may be set to approximately 2(p+1/3) or 2(p+2/3). In a QAM modulation system, (4p+3) input signal strings, where p is an integer not less than 3, are converted into three (p+1) string signals, which are then allocated to three phase planes, time-division multiplexed and multi-level modulated to realize QAM modulation in which the n-ary number may be set to approximately 2(p+3/4).
    Type: Grant
    Filed: April 2, 2003
    Date of Patent: June 12, 2007
    Assignee: NEC Corporation
    Inventor: Seiichi Noda
  • Patent number: 7167110
    Abstract: A communication system for transmitting a six-phase modulated signal and including an efficient error correction system suitable for the six-phase modulated signal is disclosed. A transmitting apparatus comprises a ternary error correction encoding circuit for generating a ternary transmit sequence, a parity generation circuit for generating a parity, a parity insertion circuit for inserting the parity into a binary transmit sequence, and a six-phase modulator for performs six-phase modulation.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: January 23, 2007
    Assignee: NEC Corporation
    Inventor: Seiichi Noda
  • Publication number: 20060088127
    Abstract: The present invention provides a modulation and demodulation system capable of minimizing a bit error rate in a six-phase phase modulation method. A senary signal phase-modulated and outputted by a modulator of a first embodiment is received and phase-modulated by a destination demodulator to a binary signal before conversion by the modulator. The modulator assigns (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) which are senary signals (bi, ti) to first to sixth phases respectively. The demodulator performs a conversion process from the senary signals to the binary signals, for instance, by storing transmitted senary signals and sequentially converting every senary signal of length m to binary signal of length b so as to output them. The process of the demodulator assigns the first to sixth phases as the senary signals (bi, ti) to (0, 0), (0, 1), (0, 2), (1, 2), (1, 1) and (1, 0) respectively.
    Type: Application
    Filed: October 21, 2005
    Publication date: April 27, 2006
    Applicant: NEC Corporation
    Inventors: Seiichi Noda, Shinichi Koike
  • Patent number: 7035340
    Abstract: A QAM modulation system capable of setting a number of multilevel to approximate 2(p+0.25) (p is an integer equal to or more than 3) or 2(p+q/n). An input data signal of 4p+1 bits are converted into four signals of p+1 bits, there being a predetermined relationship between the input data signal and the converted signals. The converted four signals are assigned to four phase planes, respectively. The four signals are time-division multiplexed and multilevel-modulated. Thereby, it becomes possible to set the number of multilevel to approximate 2(p+0.25).
    Type: Grant
    Filed: August 14, 2002
    Date of Patent: April 25, 2006
    Assignee: NEC Corporation
    Inventor: Seiichi Noda
  • Patent number: 7031403
    Abstract: In a phase modulation apparatus for modulating a phase of a carrier signal by an input signal to produce a phase-shift-keying-modulated wave, a data converter converts an input data signal having 3 bits long as the input signal into first and second ternary converted data signals. A ternary phase shift keying modulator modulates, in synchronism with a clock signal, the phase of the carrier signal by the first and the second ternary converted data signals to produce, as the phase-shift-keying-modulated wave, first and second ternary phase shift keying modulated signals, respectively. Disposed between the data converter and the ternary phase shift keying modulator, a parallel-serial converter temporally multiplexes the first and the second ternary converted data signals into first and second multiplexed signals, respectively. The parallel-serial converter supplies the ternary phase shift keying modulator with the first and the second multiplexed signals.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: April 18, 2006
    Assignee: NEC Corporation
    Inventor: Seiichi Noda
  • Publication number: 20050201479
    Abstract: Disclosed is a method and a system for performing N-ary modulation in which bit errors may be reduced against symbol error. A binary signal, a bit length thereof being n, is associated with N-ary signals arranged in first and second phase planes respectively for transmission, wherein N is not a number belonging to powers of 2 but is a number belonging to a series beginning from 12 and sequentially doubled, that is, any one of 12, 24, 48, 96, . . . , and wherein n is such that, if the bit length n is 7, 9, 11, 13, . . . , the number N is 12, 24, 48, 96, . . . , respectively, two out of the n bits are allocated for identifying four quadrants of the first phase plane, two out of the remaining (n?2) bits are allocated for identifying four quadrants of the second phase plane. The binary signal of three out of the n bits is converted into two digits of ternary signals (T1, T2). The ternary signals are mapped to the first and second phase planes with rotational symmetry of 90° or with axial symmetry.
    Type: Application
    Filed: March 8, 2005
    Publication date: September 15, 2005
    Inventor: Seiichi Noda
  • Publication number: 20040085937
    Abstract: Disclosed is a CDMA communication system and method that make it possible to accommodate a greater number of user terminals that can be connected per facilities investment. Ternary phase-shift keying (TPSK) modulation is applied as primary modulation in a CDMA communication system. It is possible to deliver far performance in which the Eb/No ratio is improved by about 0.75 dB, in comparison with BPSK and QPSK modulation, in order to obtain the required signal quality. Accordingly, the number of user terminals that can be connected simultaneously in a CDMA system can be increased by about 19%.
    Type: Application
    Filed: January 7, 2003
    Publication date: May 6, 2004
    Applicant: NEC Corporation
    Inventor: Seiichi Noda
  • Patent number: 6717532
    Abstract: A communication system comprises a transmitting apparatus and receiving apparatus for transmitting/receiving a N-ary signal, based on a prime number exceeding 2, inclusive of an efficient error correction system. The transmitting apparatus includes a binary to N-ary converting unit for converting a binary transmit signal into an N-ary signal, as an information sequence, where the N of the N-ary number is a prime number exceeding 2, an encoding unit for generating a transmit sequence, comprised of BCH code on a Galois field with the number of elements being a prime number exceeding 2, and a multi-level modulating unit for multi-level modulating the transmit sequence and for transmitting the multi-level modulated transmit sequence to a receiving apparatus.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: April 6, 2004
    Assignee: NEC Corporation
    Inventor: Seiichi Noda
  • Publication number: 20030189986
    Abstract: In a QAM modulation system, (3p+1) or (3p+2) input signal strings, where p is an integer not less than 3 or 2, are converted into three (p+1) string signals which are then allocated to three phase planes. The converted three (p+1) string signals are time-division multiplexed and multi-level modulated to realize QAM modulation in which the n-ary number may be set to approximately 2(p+1/3) or 2(p+2/3).
    Type: Application
    Filed: April 2, 2003
    Publication date: October 9, 2003
    Applicant: NEC CORPORATION
    Inventor: Seiichi Noda
  • Publication number: 20030165112
    Abstract: A communication system for transmitting a six-phase modulated signal and including an efficient error correction system suitable for the six-phase modulated signal is disclosed. A transmitting apparatus comprises a ternary error correction encoding circuit for generating a ternary transmit sequence, a parity generation circuit for generating a parity, a parity insertion circuit for inserting the parity into a binary transmit sequence, and a six-phase modulator for performs six-phase modulation.
    Type: Application
    Filed: January 7, 2003
    Publication date: September 4, 2003
    Applicant: NEC Corporation
    Inventor: Seiichi Noda
  • Publication number: 20030091120
    Abstract: A communication system comprises a transmitting apparatus and receiving apparatus for transmitting/receiving a N-ary signal, based on a prime number exceeding 2, inclusive of an efficient error correction system. The transmitting apparatus includes a binary to N-ary converting unit for converting a binary transmit signal into an N-ary signal, as an information sequence, where the N of the N-ary number is a prime number exceeding 2, an encoding unit for generating a transmit sequence, comprised of BCH code on a Galois field with the number of elements being a prime number exceeding 2, and a multi-level modulating unit for multi-level modulating the transmit sequence and for transmitting the multi-level modulated transmit sequence to a receiving apparatus.
    Type: Application
    Filed: November 5, 2002
    Publication date: May 15, 2003
    Applicant: NEC CORPORATION
    Inventor: Seiichi Noda
  • Publication number: 20030063688
    Abstract: A modulator, a communication system, and a modulation program, in which frequencies and transmission power can be used effectively by using a transmission band without a surplus by making the allowable transmission amount of a communication channel match with the requiring transmission rate, by using also the numbers of multilevel except values of the n th power of 2 in a multilevel modulation suitably, are provided. The modulator, which applies a phase modulation to communication data, provides a storing circuit that stores inputted communication data of binary signals, a converting circuit that converts binary signals of 11 digits into ternary signals of 7 digits, and a multilevel modulator that generates modulation signals based on the ternary signals of 7 digits, and outputs modulated waves.
    Type: Application
    Filed: October 1, 2002
    Publication date: April 3, 2003
    Applicant: NEC CORPORATION
    Inventor: Seiichi Noda