Patents by Inventor Seiji Ikari

Seiji Ikari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935351
    Abstract: According to one embodiment, a paper sheet processing apparatus includes a conveyance mechanism which conveys a paper sheet with fluorescent ink print information along a conveyance path, a fluorescence reference member including a fluorescent material and arranged to oppose to the conveyance path, a light source device which irradiates the fluorescence reference member with excitation light, and an imaging device which images the fluorescence emission of the fluorescence reference member and acquires an image including a contour of the paper sheet passing over the fluorescence reference member and an image of the fluorescent ink print information of the paper sheet.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: March 19, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Infrastructure Systems & Solutions Corporation
    Inventors: Shota Kure, Takahisa Nakano, Seiji Ikari
  • Publication number: 20210209886
    Abstract: According to one embodiment, a paper sheet processing apparatus includes a conveyance mechanism which conveys a paper sheet with fluorescent ink print information along a conveyance path, a fluorescence reference member including a fluorescent material and arranged to oppose to the conveyance path, a light source device which irradiates the fluorescence reference member with excitation light, and an imaging device which images the fluorescence emission of the fluorescence reference member and acquires an image including a contour of the paper sheet passing over the fluorescence reference member and an image of the fluorescent ink print information of the paper sheet.
    Type: Application
    Filed: March 18, 2021
    Publication date: July 8, 2021
    Inventors: Shota Kure, Takahisa Nakano, Seiji Ikari
  • Patent number: 10409749
    Abstract: An SCI can perform transmission only or reception only, however, it is necessary to reset the SCI when transmission and reception is switched to transmission only or to reception only. A semiconductor device includes an interface circuit which performs a sequential communication of transmit or receive according to a synchronous clock. The interface circuit includes a register to specify an operation enabled state which is at least one of a transmit state and a receive state, and a mode control circuit to change at least one mode of transmit or receive in the operation enabled state.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: September 10, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Naoki Mitsuishi, Seiji Ikari
  • Patent number: 10223304
    Abstract: A microcomputer includes a central processing unit (CPU) and a data transfer controller (DTC). The data transfer controller (DTC) reads out data transfer information including transfer mode information from a storage device (RAM) or the like. The data transfer controller (DTC) analyzes the transfer mode information to change at least one of a transfer source address, a transfer destination address, the number of transfer operations, and data transfer information that is used next.
    Type: Grant
    Filed: October 25, 2014
    Date of Patent: March 5, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Yasuhiko Takahashi, Seiji Ikari, Naoki Mitsuishi
  • Patent number: 10140207
    Abstract: There is a need to provide a microcomputer capable of eliminating an external terminal for endian selection. Flash memory includes a user boot area for storing a program executed in user boot mode and corresponding endian information and a user area for storing a program executed in user mode and corresponding endian information. A data transfer circuit reads endian information stored in the user boot area or the user area in accordance with operation mode and supplies the endian information to a CPU before reset release of the CPU. Accordingly, an external terminal for endian selection can be eliminated.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: November 27, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Mamoru Sakugawa, Tomohiro Sakurai, Katsuyoshi Watanabe, Seiji Ikari, Takashi Nasu, Tsutomu Kumagai
  • Publication number: 20180322079
    Abstract: An object is to obtain output data corresponding to input data by referring to table data by a semiconductor apparatus having a simple configuration. An MCU includes a DTC for transferring data from a source address region to a destination address region based on data transfer information in response to a startup request. The DTC performs an operation on second source address information based on data that has been read from first source address information, performs reading based on a result of the operation, and writes read data based on destination address information.
    Type: Application
    Filed: July 12, 2018
    Publication date: November 8, 2018
    Inventors: Naoki Mitsuishi, Seiji Ikari, Katsumasa Uchiyama
  • Patent number: 10102161
    Abstract: A microcomputer includes: a central processing unit (CPU); a data transfer apparatus (DTC); and a storage apparatus (RAM). The data transfer apparatus includes a plurality of register files each including a mode register storing the transfer mode information, an address register to which the address information is transferred, and a status register (SR) representing information that specifies the transfer information set. The data transfer apparatus checks the information of the status register, to determine whether to use the transfer information set held in the register files or to read the transfer information set from the storage apparatus and to rewrite a prescribed one of the register files. The data transfer apparatus performs data transfer based on the transfer information set stored in one of the register files.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: October 16, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Naoki Mitsuishi, Seiji Ikari
  • Patent number: 10049063
    Abstract: An object is to obtain output data corresponding to input data by referring to table data by a semiconductor apparatus having a simple configuration. An MCU includes a DTC for transferring data from a source address region to a destination address region based on data transfer information in response to a startup request. The DTC performs an operation on second source address information based on data that has been read from first source address information, performs reading based on a result of the operation, and writes read data based on destination address information.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: August 14, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Naoki Mitsuishi, Seiji Ikari, Katsumasa Uchiyama
  • Publication number: 20180143900
    Abstract: There is a need to provide a microcomputer capable of eliminating an external terminal for endian selection. Flash memory includes a user boot area for storing a program executed in user boot mode and corresponding endian information and a user area for storing a program executed in user mode and corresponding endian information. A data transfer circuit reads endian information stored in the user boot area or the user area in accordance with operation mode and supplies the endian information to a CPU before reset release of the CPU. Accordingly, an external terminal for endian selection can be eliminated.
    Type: Application
    Filed: January 22, 2018
    Publication date: May 24, 2018
    Inventors: Mamoru SAKUGAWA, Tomohiro SAKURAI, Katsuyoshi WATANABE, Seiji IKARI, Takashi NASU, Tsutomu KUMAGAI
  • Patent number: 9977753
    Abstract: A semiconductor device is provided, which can supply efficiently plural pieces of data required for operation to an arithmetic unit processing plural pieces of data concurrently. The microcomputer includes a data transfer controller and a filter arithmetic unit. The data transfer controller transfers plural pieces of data from a source address area to a destination address area continuously, based on data transfer information, when a start request is received. The filter arithmetic unit performs operation using concurrently plural pieces of data received from the data transfer controller.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: May 22, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Naoki Mitsuishi, Seiji Ikari
  • Patent number: 9965914
    Abstract: A magnetic detecting device according to an embodiment includes: a magnetic sensor head in which a plurality of magnetic sensing elements including a first magnetic sensing element and a second magnetic sensing element are arranged; and an environmental magnetism corrector. The plurality of magnetic sensing elements is arranged in one line over a length that is greater than a width of a sheet, in a direction that is orthogonal to a movement direction of the sheet. The environmental magnetism corrector corrects a first output signal output by the first magnetic sensing element, based on a second output signal output by the second magnetic sensing element. The magnetic sensor head has a sheet passage area that faces a sheet that passes over the magnetic sensor head, the first magnetic sensing element is positioned inside the sheet passage area, and the second magnetic sensing element is positioned outside the sheet passage area.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: May 8, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junji Miura, Seiji Ikari, Tomonori Makino
  • Patent number: 9910770
    Abstract: There is a need to provide a microcomputer capable of eliminating an external terminal for endian selection. Flash memory includes a user boot area for storing a program executed in user boot mode and corresponding endian information and a user area for storing a program executed in user mode and corresponding endian information. A data transfer circuit reads endian information stored in the user boot area or the user area in accordance with operation mode and supplies the endian information to a CPU before reset release of the CPU. Accordingly, an external terminal for endian selection can be eliminated.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: March 6, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Mamoru Sakugawa, Tomohiro Sakurai, Katsuyoshi Watanabe, Seiji Ikari, Takashi Nasu, Tsutomu Kumagai
  • Publication number: 20170212853
    Abstract: A semiconductor device is provided, which can supply efficiently plural pieces of data required for operation to an arithmetic unit processing plural pieces of data concurrently. The microcomputer includes a data transfer controller and a filter arithmetic unit. The data transfer controller transfers plural pieces of data from a source address area to a destination address area continuously, based on data transfer information, when a start request is received. The filter arithmetic unit performs operation using concurrently plural pieces of data received from the data transfer controller.
    Type: Application
    Filed: April 10, 2017
    Publication date: July 27, 2017
    Inventors: Naoki MITSUISHI, Seiji IKARI
  • Publication number: 20170158452
    Abstract: According to one embodiment, a sheet inspection device includes an illuminator configured to illuminate a sheet with first light that has a first wavelength band and is absorbed by an adhesion material adhering to the sheet at a high absorptivity and second light that has a second wavelength band and is absorbed by the adhesion material at an absorptivity lower than the first wavelength band, an illumination controller configured to control the illuminator so as to illuminate the sheet alternately with the first light and the second light, a photo receiver configured to receive the first light and the second light that have been transmitted through the sheet, and a detector configured to detect the adhesion material adherent to the sheet based on the difference between the intensity of the first light received by the photo receiver and the intensity of the second light received by the photo receiver.
    Type: Application
    Filed: December 7, 2016
    Publication date: June 8, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Seiji IKARI
  • Patent number: 9652229
    Abstract: A semiconductor device is provided, which can supply efficiently plural pieces of data required for operation to an arithmetic unit processing plural pieces of data concurrently. The microcomputer includes a data transfer controller and a filter arithmetic unit. The data transfer controller transfers plural pieces of data from a source address area to a destination address area continuously, based on data transfer information, when a start request is received. The filter arithmetic unit performs operation using concurrently plural pieces of data received from the data transfer controller.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: May 16, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Naoki Mitsuishi, Seiji Ikari
  • Patent number: 9588193
    Abstract: According to one embodiment, a magnetic sensor includes: a case disposed facing an object that is to be detected; a plurality of magnetic sensing portions accommodated inside the case; and a magnetic generator disposed inside the case, between the plurality of magnetic sensing portions and the object that is to be detected.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: March 7, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junji Miura, Seiji Ikari
  • Publication number: 20170019142
    Abstract: An SCI can perform transmission only or reception only, however, it is necessary to reset the SCI when transmission and reception is switched to transmission only or to reception only. A semiconductor device includes an interface circuit which performs a sequential communication of transmit or receive according to a synchronous clock. The interface circuit includes a register to specify an operation enabled state which is at least one of a transmit state and a receive state, and a mode control circuit to change at least one mode of transmit or receive in the operation enabled state.
    Type: Application
    Filed: May 2, 2016
    Publication date: January 19, 2017
    Inventors: Naoki MITSUISHI, Seiji IKARI
  • Patent number: 9524237
    Abstract: The present invention provides a data processing device where a program can be commonly used and a vector table can be shared regardless of types of endian in a bi-endian system. An instruction is fixed to little endian, and endian of data to be used for executing the instruction is variable. A size of the respective vector addresses in the vector table is 32 bits, and the number of bits at the time of a data access is maximally 32 bits. A CPU fetches an instruction, and before the fetched instruction is executed, the CPU accesses to, for example, for 32-bit data in a memory. At this time, the CPU controls the aligner so that addresses and alignments of data to be stored in each address in byte unit in a data register are identical to addresses and alignments of data determined by little endian of an instruction without depending on types of the endian of the data.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: December 20, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Naoshi Ishikawa, Seiji Ikari, Hiromi Nagayama
  • Publication number: 20160314068
    Abstract: There is a need to provide a microcomputer capable of eliminating an external terminal for endian selection. Flash memory includes a user boot area for storing a program executed in user boot mode and corresponding endian information and a user area for storing a program executed in user mode and corresponding endian information. A data transfer circuit reads endian information stored in the user boot area or the user area in accordance with operation mode and supplies the endian information to a CPU before reset release of the CPU. Accordingly, an external terminal for endian selection can be eliminated.
    Type: Application
    Filed: June 29, 2016
    Publication date: October 27, 2016
    Inventors: Mamoru SAKUGAWA, Tomohiro SAKURAI, Katsuyoshi WATANABE, Seiji IKARI, Takashi NASU, Tsutomu KUMAGAI
  • Patent number: 9395999
    Abstract: There is a need to provide a microcomputer capable of eliminating an external terminal for endian selection. Flash memory includes a user boot area for storing a program executed in user boot mode and corresponding endian information and a user area for storing a program executed in user mode and corresponding endian information. A data transfer circuit reads endian information stored in the user boot area or the user area in accordance with operation mode and supplies the endian information to a CPU before reset release of the CPU. Accordingly, an external terminal for endian selection can be eliminated.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: July 19, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Mamoru Sakugawa, Tomohiro Sakurai, Katsuyoshi Watanabe, Seiji Ikari, Takashi Nasu, Tsutomu Kumagai