Patents by Inventor Seiji Mochizuki

Seiji Mochizuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11687357
    Abstract: In a virtualization system that includes a hypervisor that performs OSID management for linking a plurality of OSs with resources, a guest OS that receives an initial value from the hypervisor and sets a OSID for each resource, and a OSID manager that sets a OSID for each resource, a new OSID created by OSID generator in OSID manager after a certain period of time has elapsed after setting the initial value is set to the guest OS and the IP (resource), and is requested to be updated to a new OSID set by the update controller in OSID manager. This enables simultaneous updating of OSID of the guest operating system and the resources, thus achieving high robustness.
    Type: Grant
    Filed: October 6, 2020
    Date of Patent: June 27, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tetsuya Shibayama, Nhat Van Huynh, Katsushige Matsubara, Seiji Mochizuki
  • Patent number: 11687261
    Abstract: A semiconductor device for achieving consistency of data is provided. The process performed by the semiconductor device includes a step of compressing data to generate compression information representing compressed data and the amount of information, a step of accessing management data for controlling access to a memory area, a step of permitting writing to a memory area in units of a predetermined data size based on the fact that the management data indicates that the accessed area is not exclusively allocated to another compression/expansion module, a step of writing data to update management data, a step of permitting reading from the area in units of the data size based on the fact that the management data indicates that the accessed area is not exclusively owned to another compression/expansion module, and a step of reading the compressed data and the compressed information from the area in units of the data size.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: June 27, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Katsushige Matsubara, Seiji Mochizuki
  • Patent number: 11606552
    Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: March 14, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Maiki Hosokawa, Toshiyuki Kaya, Tetsuya Shibayama, Seiji Mochizuki, Tomohiro Une, Kazushi Akie
  • Publication number: 20220057950
    Abstract: A semiconductor device for achieving consistency of data is provided. The process performed by the semiconductor device includes a step of compressing data to generate compression information representing compressed data and the amount of information, a step of accessing management data for controlling access to a memory area, a step of permitting writing to a memory area in units of a predetermined data size based on the fact that the management data indicates that the accessed area is not exclusively allocated to another compression/expansion module, a step of writing data to update management data, a step of permitting reading from the area in units of the data size based on the fact that the management data indicates that the accessed area is not exclusively owned to another compression/expansion module, and a step of reading the compressed data and the compressed information from the area in units of the data size.
    Type: Application
    Filed: November 3, 2021
    Publication date: February 24, 2022
    Inventors: Katsushige MATSUBARA, Seiji MOCHIZUKI
  • Patent number: 11194491
    Abstract: A semiconductor device for achieving consistency of data is provided. The process performed by the semiconductor device includes a step of compressing data to generate compression information representing compressed data and the amount of information, a step of accessing management data for controlling access to a memory area, a step of permitting writing to a memory area in units of a predetermined data size based on the fact that the management data indicates that the accessed area is not exclusively allocated to another compression/expansion module, a step of writing data to update management data, a step of permitting reading from the area in units of the data size based on the fact that the management data indicates that the accessed area is not exclusively owned to another compression/expansion module, and a step of reading the compressed data and the compressed information from the area in units of the data size.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: December 7, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Katsushige Matsubara, Seiji Mochizuki
  • Patent number: 11190805
    Abstract: Provided is a data processing device that reduces the amount of memory access in a case where data and an error control code are to be stored in a memory. The processing device includes a data compression section, a code generation section, a binding section, and a transfer section. The data compression section generates second data by performing a predetermined compression process on first data that is to be stored in a memory and of a predetermined data length. The code generation section generates an error control code for the first data or the second data. The binding section generates third data by binding the second data generated by the data compression section to the error control code generated by the code generation section. The transfer section transfers the third data generated by the binding section to the memory in units of the predetermined data length.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: November 30, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Katsushige Matsubara, Seiji Mochizuki, Keisuke Matsumoto
  • Publication number: 20210352278
    Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.
    Type: Application
    Filed: July 20, 2021
    Publication date: November 11, 2021
    Inventors: Maiki HOSOKAWA, Toshiyuki KAYA, Tetsuya SHIBAYAMA, Seiji MOCHIZUKI, Tomohiro UNE, Kazushi AKIE
  • Patent number: 11102475
    Abstract: A video encoding device includes a local decode generation unit for generating a reference image based on a result of encoding of a divided image, a compression unit for compressing the reference image to generate a compressed data, a reference image storage determination unit for determining whether to store the compressed data in a memory, and an inter-prediction unit for performing motion vector search for inter-coding based on a reference image stored in the memory. The reference image storage determination unit sets an allowable data amount used for storing the reference image for each determined area of the moving image data, and determines whether or not to store the compressed data obtained by compressing the reference image in the memory based on the allowable data amount. Inter-prediction unit sets the reference image corresponding to the compressed data stored in the memory as the search range of motion vector search.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: August 24, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Maiki Hosokawa, Toshiyuki Kaya, Tetsuya Shibayama, Seiji Mochizuki, Tomohiro Une, Kazushi Akie
  • Publication number: 20210132978
    Abstract: In a virtualization system that includes a hypervisor that performs OSID management for linking a plurality of OSs with resources, a guest OS that receives an initial value from the hypervisor and sets a OSID for each resource, and a OSID manager that sets a OSID for each resource, a new OSID created by OSID generator in OSID manager after a certain period of time has elapsed after setting the initial value is set to the guest OS and the IP (resource), and is requested to be updated to a new OSID set by the update controller in OSID manager. This enables simultaneous updating of OSID of the guest operating system and the resources, thus achieving high robustness.
    Type: Application
    Filed: October 6, 2020
    Publication date: May 6, 2021
    Inventors: Tetsuya SHIBAYAMA, Nhat Van HUYNH, Katsushige MATSUBARA, Seiji MOCHIZUKI
  • Patent number: 10986373
    Abstract: An image encoding device includes an encoding circuit configured to encode an image, the image being constituted of a plurality of columns and a plurality of rows of which width are longer than the columns, generate a reference image and stores the reference image into a memory, and output a bit stream including the encoded image. The image encoding device also includes an image rotation circuit configured to rotate the image read from the memory by 90° and output the rotated image to a encoding processing circuit, and a read address generating circuit configured to read the column of the image from the memory, and provide the column with the image rotation circuit.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: April 20, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Seiji Mochizuki, Kazushi Akie, Tetsuya Shibayama, Kenichi Iwata
  • Patent number: 10782886
    Abstract: To provide a semiconductor device which suppresses a delay in processing. The semiconductor device is equipped with a plurality of read units which read data stored across a plurality of banks in a memory having the banks, and an access method managing section which, when one of the read units reads the data, determines a read start bank number being a bank number to start reading according to operation situations of the read units excepting the one read unit, and instructs the determined read start bank number to the one read unit.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: September 22, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Nhat Van Huynh, Seiji Mochizuki, Katsushige Matsubara, Toshiyuki Kaya
  • Publication number: 20200296409
    Abstract: The decoding method is a decoding method for decoding a bitstream, in which a difference between a reference index and a prediction value of a motion vector is used for each block obtained by dividing each frame of a moving picture in which a plurality of frames are consecutive, in which a plurality of groups having a predetermined number of blocks are defined in each frame and a limitation is applied for each group to a range of reference index and differences of blocks other than the first block in the group, and the decoding method includes a step for determining whether the block to be decoded is the first block of the group, a step for decoding using the reference index and difference if the block is not the first block, and a step for decoding using the limited reference index and differences if the block is not the first block.
    Type: Application
    Filed: March 6, 2020
    Publication date: September 17, 2020
    Inventors: Ryoji HASHIMOTO, Seiji MOCHIZUKI
  • Patent number: 10719440
    Abstract: Regarding association between an area where compressed data is stored and an area where auxiliary information required to access the compressed data is stored, it is necessary to manage the association by software for each processing unit, so that the processing becomes complicated. A management unit memory area including a compressed data storage area and an auxiliary information storage area including auxiliary information are defined on a memory space. By calculating an auxiliary information address from an address indicating a location on a memory where a management unit memory space is set, an address of the auxiliary information storage area, and an address of the compressed data, the compressed data and the auxiliary information are associated with each other and the auxiliary information is read.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: July 21, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Keisuke Matsumoto, Seiji Mochizuki, Hiroshi Ueda, Katsushige Matsubara
  • Patent number: D1006682
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: December 5, 2023
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Chung Woo Lee, Robert Seiji Mochizuki, Byung Hyun Yoo
  • Patent number: D1007383
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: December 12, 2023
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Robert Seiji Mochizuki, Chung Woo Lee
  • Patent number: D1011244
    Type: Grant
    Filed: May 2, 2023
    Date of Patent: January 16, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Robert Seiji Mochizuki, Chung Woo Lee, Yeongmin Kong
  • Patent number: D1011977
    Type: Grant
    Filed: May 2, 2023
    Date of Patent: January 23, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Robert Seiji Mochizuki, Chung Woo Lee, Ferenc Tobak, IV
  • Patent number: D1012794
    Type: Grant
    Filed: May 2, 2023
    Date of Patent: January 30, 2024
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Robert Seiji Mochizuki, Chung Woo Lee, Scott Matthew Roller, Ferenc Tobak, IV
  • Patent number: D1016686
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: March 5, 2024
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Robert Seiji Mochizuki, Peter Kim, Joonsung Ea
  • Patent number: D1018376
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: March 19, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Kengo Iwanaga, Robert Seiji Mochizuki, Yeongmin Kong