Patents by Inventor Seiji Sakurai
Seiji Sakurai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240154003Abstract: Provided is a semiconductor device in which a boundary region between a transistor portion and a diode portion includes: a first portion which is in contact with the transistor portion and is not provided with a lifetime adjustment region; and a second portion which is in contact with the diode portion and to which the lifetime adjustment region of the diode portion extends, a density distribution of a lifetime killer in a first direction has a lateral slope where a density of the lifetime killer decreases from the second portion of the boundary region toward the first portion, a width of the first portion is smaller than a width of the second portion in the first direction, and the width of the first portion is equal to or larger than a width of the lateral slope in the first direction.Type: ApplicationFiled: October 24, 2023Publication date: May 9, 2024Inventors: Yosuke SAKURAI, Tatsuya NAITO, Seiji NOGUCHI, Motoyoshi KUBOUCHI, Naoko KODAMA, Hiroshi TAKISHITA
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Publication number: 20240128362Abstract: Provided is a semiconductor device comprising: a plurality of trench portions include a gate trench portion and a dummy trench portion; a first lower end region of a second conductivity type that is provided to be in contact with lower ends of two or more trench portions which include the gate trench portion; a well region of a second conductivity type that is arranged in a different location from the first lower end region in a top view, and a second lower end region of a second conductivity type that is provided between the first lower end region and the well region in a top view being separated from the first lower end region and the well region, and provided to be in contact with lower ends of one or more trench portions including the gate trench portion.Type: ApplicationFiled: December 18, 2023Publication date: April 18, 2024Inventors: Yosuke SAKURAI, Seiji NOGUCHI, Kosuke YOSHIDA, Ryutaro HAMASAKI, Takuya YAMADA
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Publication number: 20240120412Abstract: Provided is a semiconductor device comprising a semiconductor substrate provided with a drift region of a first conductivity type, wherein the substrate includes: an active portion; and a trench portion provided in the active portion at an upper surface of the substrate, the active portion includes: a first region in which trench portions including the trench portion are arrayed at a first trench interval in an array direction; and a second region in which trench portions including the trench portion are arrayed at a second trench interval greater than the first trench interval in the array direction, the first region includes a first bottom region of a second conductivity type provided over bottoms of at least two trench portions of the trench portions, and the second region includes a second bottom region of the second conductivity type provided at a bottom of one trench portion of the trench portions.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Seiji NOGUCHI, Yosuke SAKURAI, Yoshihiro IKURA, Ryutaro HAMASAKI, Daisuke OZAKI
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Publication number: 20240120413Abstract: Provided is a semiconductor device comprising: a plurality of trench portions; a first lower end region of a second conductivity type that is provided to be in contact with lower ends of two or more trench portions which include the gate trench portion; a well region of the second conductivity type that is arranged in a different location from the first lower end region in a top view, and a second lower end region of the second conductivity type that is provided between the first lower end region and the well region in a top view being separated from the first lower end region and the well region, and provided to be in contact with lower ends of one or more trench portions including the gate trench portion.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Yosuke SAKURAI, Seiji NOGUCHI, Kosuke YOSHIDA, Ryutaro HAMASAKI, Takuya YAMADA
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Publication number: 20240072110Abstract: Provided is a semiconductor device including a transistor portion, in which the transistor portion has a drift region of a first conductivity type provided in a semiconductor substrate, a base region of a second conductivity type provided above the drift region, an accumulation region of the first conductivity type provided above the drift region, a plurality of trench portions provided to extend from a front surface of the semiconductor substrate to the drift region, and a trench bottom portion of the second conductivity type provided in bottom portions of the plurality of trench portions, and the accumulation region has a doping concentration with a half width of 0.3 ?m or more.Type: ApplicationFiled: July 24, 2023Publication date: February 29, 2024Inventors: Nao SUGANUMA, Yosuke SAKURAI, Seiji NOGUCHI, Ryutaro HAMASAKI, Takuya YAMADA
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Publication number: 20230376158Abstract: The present disclosure relates to a sensor board and a display device. The sensor board includes a light-emitting device array (106) in which light-emitting devices is two-dimensionally arranged and loop coils which, in operation, detects a position that has been indicated by an electronic pen, through electromagnetic induction generated with the electronic pen. Line conductors connected to the light-emitting devices of the light-emitting device array is partly used in common as coil conductors formed by the loop coils.Type: ApplicationFiled: July 31, 2023Publication date: November 23, 2023Inventors: Yoshihiro KOTANI, Yutaka NOMURA, Kyohei ONO, Seiji SAKURAI, Kei NISHINO, Naoki WATANABE
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Patent number: 10718789Abstract: According to one embodiment, there is provided a common test board including a socket board, an IP evaluation board, and a common board. To the socket board, a semiconductor device is to be connected. On the IP evaluation board, the socket board is able to be attached. On the common board, the IP evaluation board is able to be attached.Type: GrantFiled: September 10, 2018Date of Patent: July 21, 2020Assignee: Kabushiki Kaisha ToshibaInventors: Masato Onda, Seiji Sakurai
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Publication number: 20190004088Abstract: According to one embodiment, there is provided a common test board including a socket board, an IP evaluation board, and a common board. To the socket board, a semiconductor device is to be connected. On the IP evaluation board, the socket board is able to be attached. On the common board, the IP evaluation board is able to be attached.Type: ApplicationFiled: September 10, 2018Publication date: January 3, 2019Inventors: Masato Onda, Seiji Sakurai
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Patent number: 10101359Abstract: According to one embodiment, there is provided a common test board including a socket board, an IP evaluation board, and a common board. To the socket board, a semiconductor device is to be connected. On the IP evaluation board, the socket board is able to be attached. On the common board, the IP evaluation board is able to be attached.Type: GrantFiled: January 8, 2016Date of Patent: October 16, 2018Assignee: Kabushiki Kaisha ToshibaInventors: Masato Onda, Seiji Sakurai
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Publication number: 20160266167Abstract: According to one embodiment, there is provided a common test board including a socket board, an IP evaluation board, and a common board. To the socket board, a semiconductor device is to be connected. On the IP evaluation board, the socket board is able to be attached. On the common board, the IP evaluation board is able to be attached.Type: ApplicationFiled: January 8, 2016Publication date: September 15, 2016Inventors: Masato Onda, Seiji Sakurai
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Patent number: 5362033Abstract: A hot plate is used with a molten metal storage container in which a molten metal or bath is temporarily stored prior to any subsequent casting process, and keeps the molten metal temporarily stored in the storage container at a specific constant temperature by heating the molten metal as required. The temperature of the stored molten metal is controlled so that it cannot fall below the particular temperature.The hot plate includes a heating unit formed in a flat shape from any suitable heat resistant, electrically insulating material and having an electric heating wire or coil therein: and A box unit made of any suitable ceramic material has the flat heating unit freely inserted and removably mounted therein.As a variation of the hot plate, the box unit may include a ceramic coating layer formed on the outer peripheral surface thereof, the ceramic coating layer being reinforced with any suitable fibrous ceramic textile.Type: GrantFiled: October 26, 1993Date of Patent: November 8, 1994Assignees: Nichias Corporation, Ariake Ceramic Constructions Co., Ltd.Inventors: Seiji Sakurai, Junichi Kuchiki, Hideo Tanaka, Syoichi Naruse, Shigeru Fukumaru
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Patent number: 5323484Abstract: A heating apparatus including a process tube in which the target objects are arranged in an internal heating area and a multilayer insulating structure arranged so to enclose the process tube. At the inner face of an inorganic molded structure of bulk density 0.3-0.8 g/cm.sup.3, an inorganic insulating layer of bulk density 1.0-2.0 g/cm.sup.3 covered on the inner face or all faces thereof by inorganic cloth is provided to form the multilayer insulating structure. The inner face of the inorganic insulating layer is used to support a heat generating means. A cooling means is also provided for cooling the flat heating area of the process tube. As a result, a heating apparatus of the present invention is provided that features excellent endurance against spalling, deterioration and chemical reaction, and which is capable of long term stability with respect to temperature increase and decrease.Type: GrantFiled: January 28, 1993Date of Patent: June 21, 1994Assignee: Tokyo Electron Sagami Kabushiki KaishaInventors: Ken Nakao, Seiji Sakurai, Yoshihisa Miyahara, Yoshiyuki Motoyoshi
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Patent number: 5229576Abstract: A heating apparatus provided with a double layered heat-insulating material. This heat-insulating material includes an inner layer portion constituted by an alumina fiber/inorganic filler/inorganic binder and having a bulk density of 0.3 to 0.8 g/cm.sup.3, and an outer layer portion integrally laminated on the inner layer portion, and constituted by an alumina silica fiber/ inorganic binder and having a bulk density of 0.2 to 0.4 g/cm.sup.3 which is smaller than that of the inner layer portion.Type: GrantFiled: February 28, 1992Date of Patent: July 20, 1993Assignee: Tokyo Electron Sagami LimitedInventors: Ken Nakao, Seiji Sakurai, Yoshihisa Miyahara, Yoshiyuki Motoyoshi
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Patent number: 4755228Abstract: A molding material of a mixture of 0.1-7 wt % of alkali-resistant zirconia glass fibers of 3-25 mm length, 20-60 wt % of wollastonite fibers, and 40-80 wt % of calcium aluminate cement.Type: GrantFiled: May 12, 1987Date of Patent: July 5, 1988Assignee: Nichias CorporationInventors: Seiji Sakurai, Kaoru Umino
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Patent number: 4622070Abstract: A fibrous composite material useful in contact with fused aluminum or aluminum alloys is disclosed. The composite material is comprised of alumino silicate-based ceramic fibers, at least one micaceous mineral, an inorganic binder, a dispersant and a plasticizer.Type: GrantFiled: November 14, 1984Date of Patent: November 11, 1986Assignee: Nichias CorporationInventors: Seiji Sakurai, Kaoru Umino