Patents by Inventor Seijirou Kojima

Seijirou Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7039572
    Abstract: In a gate-level logic simulation, a change in electric current is calculated from event information 5 output from a logic simulator 4 through use of a current waveform calculation section 7. The thus-calculated change in current is subjected to FFT processing through use of an FFT processing section 9, thereby determining a frequency characteristic of EMI and enabling EMI analysis.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: May 2, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hidetoshi Narahara, Seijirou Kojima, Hiroyuki Tsujikawa, Kenji Shimazaki, Kasumi Hamaguchi
  • Patent number: 6959250
    Abstract: In contrast with a known dynamic gate-level simulation method, a method of analyzing electromagnetic interference (an EMI analysis method) according to the present invention enables estimation of EMI noise, by means of calculating signal propagation of each node through use of the signal propagation probability technique, and calculating variation time of each node through use of “the Static timing analysis technique”. In short, the present invention is characterized in calculating a frequency characteristic from the relationship between toggle probability of each node and delay in each node.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: October 25, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenji Shimazaki, Hiroyuki Tsujikawa, Seijirou Kojima, Shouzou Hirano