Patents by Inventor Seiki O. Ogura

Seiki O. Ogura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Nonvolatile memory cell, operating method of the same and nonvolatile memory array
    Patent number: 6804149
    Abstract: The present invention relates to a nonvolatile memory cell and/or array and a method of operating the same high integrated density nonvolatile memory cell enabling high integration density, low voltage programming and/or high speed programming, a method of programming same and a nonvolatile memory array. A p-well 101 is formed in a surface of a substrate 10 and a channel forming semiconductor region 110 is defined in a surface of the p-well 101 and separated by a first n+ region 121 and a second n+ region 122. A carrier-supplying portion (CS: carrier supply) 111 is formed coming into contact with the first n+ region 121 and a carrier-acceleration-injection portion 112 (AI: acceleration and injection) is in contact with the second n+ region 122 in the channel forming semiconductor region 110 wherein the carrier-supplying portion 111 and carrier-acceleration-injection portion 112 are in contact with each other.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: October 12, 2004
    Assignee: New Halo, Inc.
    Inventors: Seiki O. Ogura, Yutaka Hayashi
  • Nonvolatile memory cell, operating method of the same and nonvolatile memory array
    Publication number: 20020149060
    Abstract: The present invention relates to a nonvolatile memory cell and/or array and a method of operating the same high integrated density nonvolatile memory cell enabling high integration density, low voltage programming and/or high speed programming, a method of programming same and a nonvolatile memory array.
    Type: Application
    Filed: March 20, 2002
    Publication date: October 17, 2002
    Applicant: HALO LSI, Inc.
    Inventors: Seiki O. Ogura, Yutaka Hayashi
  • Nonvolatile memory cell, operating method of the same and nonvolatile memory array
    Publication number: 20020149061
    Abstract: The present invention relates to a nonvolatile memory cell and/or array and a method of operating the same high integrated density nonvolatile memory cell enabling high integration density, low voltage programming and/or high speed programming, a method of programming same and a nonvolatile memory array.
    Type: Application
    Filed: March 20, 2002
    Publication date: October 17, 2002
    Applicant: HALO LSI, Inc.
    Inventors: Seiki O. Ogura, Yutaka Hayashi
  • Nonvolatile memory cell, operating method of the same and nonvolatile memory array
    Patent number: 6388293
    Abstract: The present invention relates to a nonvolatile memory cell and/or array and a method of operating the same high integrated density nonvolatile memory cell enabling high integration density, low voltage programming and/or high speed programming, a method of programming same and a nonvolatile memory array. A p-well 101 is formed in a surface of a substrate 10 and a channel forming semiconductor region 110 is defined in a surface of the p-well 101 and separated by a first n+ region 121 and a second n+ region 122. A carrier-supplying portion (CS: carrier supply) 111 is formed coming into contact with the first n+ region 121 and a carrier-acceleration-injection portion 112 (AI: acceleration and injection) is in contact with the second n+ region 122 in the channel forming semiconductor region 110 wherein the carrier-supplying portion 111 and carrier-acceleration-injection portion 112 are in contact with each other.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: May 14, 2002
    Assignees: Halo LSI Design & Device Technology, Inc., New Halo, Inc.
    Inventors: Seiki O. Ogura, Yutaka Hayashi