Patents by Inventor Seishin Asato
Seishin Asato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8023018Abstract: A solid-state imaging device having: (a) a pixel array with an oblique pixel pattern in which pixels are obliquely disposed, an odd-numbered row vertical signal line in an odd-numbered row vertical signal line group being connected to each column of odd-numbered row pixels and an even-numbered row vertical signal line in an even-numbered row vertical signal line group being connected to each column of even-numbered row pixels; (b) a row selector for separately selecting an odd-numbered row and an even-numbered row of the oblique pixel pattern; (c) an odd-numbered row column processing circuit group including column processing circuits and connected to the odd-numbered row vertical signal line group, for adding signals of the odd-numbered row pixels between columns; (d) an even-numbered row column processing circuit group including column processing circuits and connected to the even-numbered row vertical signal line group, for adding signals of the even-numbered row pixels in pixel columns; and (d) a column sType: GrantFiled: February 26, 2009Date of Patent: September 20, 2011Assignee: Sony CorporationInventors: Kazuhide Yokota, Hisashi Kurebayashi, Kenji Tanaka, Akira Matsui, Yutaka Yoneda, Seishin Asato, Takuya Chiba, Ryota Kosakai
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Patent number: 7839961Abstract: The invention aims at providing communication timing changing method and device which are capable of changing timing of communication for setting control parameters used to determine operations of analog devices in the analog devices, respectively, over to another one not impeding any of the operation of the analog devices. An interface decoder decodes a control parameter communication signal outputted from a CPU, converts the resulting signal into control parameters, and preserves the resulting control parameters in a register. Interface encoders perform timing management based on a synchronous signal received from a synchronous signal generating circuit, read out the control parameters to be set in analog devices such as an image sensor driving circuit, a sample and hold circuit, and an ADC from a register, and communicate with the analog devices at good timing during a blanking period to set the control parameters in the analog devices, respectively.Type: GrantFiled: February 2, 2006Date of Patent: November 23, 2010Assignee: Sony CorporationInventors: Seishin Asato, Akira Matsui, Naoki Hayashi, Tomoki Numata
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Patent number: 7570290Abstract: A drive method for a solid-state imaging device having an oblique pixel pattern includes the steps of: adding, separately for an odd-numbered row and an even-numbered row, x pixels in the horizontal direction and y pixels in the vertical direction, the x pixels and the y pixels having the same color, in an area having adjacent n pixels in the horizontal direction and adjacent n pixels in the vertical direction, where n is an odd number of three or greater and n?x?y; and repeatedly adding the x pixels and the y pixels while shifting the n×n area by m pixels in the vertical or horizontal direction, where m is an odd number of three or greater. The n×n area of odd-numbered rows is displaced from that of even-numbered rows by m pixels in the oblique direction in the oblique pixel pattern.Type: GrantFiled: December 14, 2005Date of Patent: August 4, 2009Assignee: Sony CorporationInventors: Kazuhide Yokota, Hisashi Kurebayashi, Kenji Tanaka, Akira Matsui, Yutaka Yoneda, Seishin Asato, Takuya Chiba, Ryota Kosakai
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Publication number: 20090160988Abstract: A solid-state imaging device having: (a) a pixel array with an oblique pixel pattern in which pixels are obliquely disposed, an odd-numbered row vertical signal line in an odd-numbered row vertical signal line group being connected to each column of odd-numbered row pixels and an even-numbered row vertical signal line in an even-numbered row vertical signal line group being connected to each column of even-numbered row pixels; (b) a row selector for separately selecting an odd-numbered row and an even-numbered row of the oblique pixel pattern; (c) an odd-numbered row column processing circuit group including column processing circuits and connected to the odd-numbered row vertical signal line group, for adding signals of the odd-numbered row pixels between columns; (d) an even-numbered row column processing circuit group including column processing circuits and connected to the even-numbered row vertical signal line group, for adding signals of the even-numbered row pixels in pixel columns; and (d) a column sType: ApplicationFiled: February 26, 2009Publication date: June 25, 2009Applicant: SONY CORPORATIONInventors: Kazuhide Yokota, Hisashi Kurebayashi, Kenji Tanaka, Akira Matsui, Yutaka Yoneda, Seishin Asato, Takuya Chiba, Ryota Kosakai
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Patent number: 7479988Abstract: The video camera apparatus obtains a still image sensing signal with high image quality in a progressive scan mode and is capable of recording onto a recording medium by a recording means which performs recording operation corresponding to an interlace scan mode. An image sensing signal read from a CCD image sensor 23 in the interlace scan mode is recorded directly onto a recording medium by a recording/reproducing section 5 through a camera signal processing circuit 24, while an image sensing signal read from the CCD image sensor 23 in the progressive scan mode is converted into an interlace scan signal and is then recorded onto a recording medium by the recording/reproducing section 5.Type: GrantFiled: April 6, 2005Date of Patent: January 20, 2009Assignee: Sony CorporationInventors: Masatoshi Sase, Hidehiko Teshirogi, Seishin Asato
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Publication number: 20060193412Abstract: The invention aims at providing communication timing changing method and device which are capable of changing timing of communication for setting control parameters used to determine operations of analog devices in the analog devices, respectively, over to another one not impeding any of the operation of the analog devices. An interface decoder decodes a control parameter communication signal outputted from a CPU, converts the resulting signal into control parameters, and preserves the resulting control parameters in a register. Interface encoders perform timing management based on a synchronous signal received from a synchronous signal generating circuit, read out the control parameters to be set in analog devices such as an image sensor driving circuit, a sample and hold circuit, and an ADC from a register, and communicate with the analog devices at good timing during a blanking period to set the control parameters in the analog devices, respectively.Type: ApplicationFiled: February 2, 2006Publication date: August 31, 2006Applicant: Sony CorporationInventors: Seishin Asato, Akira Matsui, Naoki Hayashi, Tomoki Numata
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Publication number: 20060157760Abstract: An imaging apparatus using a solid-state image sensor that reads out a signal of each pixel by an XY address method to capture an image includes a mechanical shutter configured to block light incident on a light receiving surface of the solid-state image sensor; and control means for simultaneously resetting the pixel signals for all rows in the solid-state image sensor to start exposure to the solid-state image sensor, closing the mechanical shutter after a predetermined exposure period is elapsed, and sequentially reading out the pixel signals for every row of the solid-state image sensor with the mechanical shutter being closed.Type: ApplicationFiled: December 28, 2005Publication date: July 20, 2006Applicant: Sony CorporationInventors: Naoki Hayashi, Seishin Asato, Kenji Tanaka
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Publication number: 20060139469Abstract: A drive method for a solid-state imaging device having an oblique pixel pattern includes the steps of: adding, separately for an odd-numbered row and an even-numbered row, x pixels in the horizontal direction and y pixels in the vertical direction, the x pixels and the y pixels having the same color, in an area having adjacent n pixels in the horizontal direction and adjacent n pixels in the vertical direction, where n is an odd number of three or greater and n?x?y; and repeatedly adding the x pixels and the y pixels while shifting the n×n area by m pixels in the vertical or horizontal direction, where m is an odd number of three or greater. The n×n area of odd-numbered rows is displaced from that of even-numbered rows by m pixels in the oblique direction in the oblique pixel pattern.Type: ApplicationFiled: December 14, 2005Publication date: June 29, 2006Inventors: Kazuhide Yokota, Hisashi Kurebayashi, Kenji Tanaka, Akira Matsui, Yutaka Yoneda, Seishin Asato, Takuya Chiba, Ryota Kosakai
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Patent number: 7053934Abstract: The video camera apparatus obtains a still image sensing signal with high image quality in a progressive scan mode and is capable of recording onto a recording medium by a recording means which performs recording operation corresponding to an interlace scan mode. An image sensing signal read from a CCD image sensor 23 in the interlace scan mode is recorded directly onto a recording medium by a recording/reproducing section 5 through a camera signal processing circuit 24, while an image sensing signal read from the CCD image sensor 23 in the progressive scan mode is converted into an interlace scan signal and is then recorded onto a recording medium by the recording/reproducing section 5.Type: GrantFiled: March 25, 2005Date of Patent: May 30, 2006Assignee: Sony CorporationInventors: Masatoshi Sase, Hidehiko Teshirogi, Seishin Asato
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Patent number: 6970191Abstract: The video camera apparatus obtains a still image sensing signal with high image quality in a progressive scan mode and is capable of recording onto a recording medium by a recording means which performs recording operation corresponding to an interlace scan mode. An image sensing signal read from a CCD image sensor 23 in the interlace scan mode is recorded directly onto a recording medium by a recording/reproducing section 5 through a camera signal processing circuit 24, while an image sensing signal read from the CCD image sensor 23 in the progressive scan mode is converted into an interlace scan signal and is then recorded onto a recording medium by the recording/reproducing section 5.Type: GrantFiled: July 20, 1999Date of Patent: November 29, 2005Assignee: Sony CorporationInventors: Masatoshi Sase, Hidehiko Teshirogi, Seishin Asato
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Publication number: 20050179792Abstract: The video camera apparatus obtains a still image sensing signal with high image quality in a progressive scan mode and is capable of recording onto a recording medium by a recording means which performs recording operation corresponding to an interlace scan mode. An image sensing signal read from a CCD image sensor 23 in the interlace scan mode is recorded directly onto a recording medium by a recording/reproducing section 5 through a camera signal processing circuit 24, while an image sensing signal read from the CCD image sensor 23 in the progressive scan mode is converted into an interlace scan signal and is then recorded onto a recording medium by the recording/reproducing section 5.Type: ApplicationFiled: April 6, 2005Publication date: August 18, 2005Inventors: Masatoshi Sase, Hidehiko Teshirogi, Seishin Asato
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Publication number: 20050168598Abstract: The video camera apparatus obtains a still image sensing signal with high image quality in a progressive scan mode and is capable of recording onto a recording medium by a recording means which performs recording operation corresponding to an interlace scan mode. An image sensing signal read from a CCD image sensor 23 in the interlace scan mode is recorded directly onto a recording medium by a recording/reproducing section 5 through a camera signal processing circuit 24, while an image sensing signal read from the CCD image sensor 23 in the progressive scan mode is converted into an interlace scan signal and is then recorded onto a recording medium by the recording/reproducing section 5.Type: ApplicationFiled: March 25, 2005Publication date: August 4, 2005Inventors: Masatoshi Sase, Hidehiko Teshirogi, Seishin Asato
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Patent number: 6798448Abstract: An imaging apparatus can obtain a high quality still picture imaging signal in the all pixels read out mode and output it by means of an output processing means adapted to the interlaced read out mode. The imaging signal read out from a CCD image sensor 23 in the interlaced read out mode is directly supplied to a DV recording/reproducing processing section 4 by way of a camera signal processing circuit 24. The imaging signal read out from said CCD image sensor 23 in the apparatus is converted into an interlaced signal by a scan conversion section 3A, which is then supplied to the DV recording/reproducing processing section 4.Type: GrantFiled: July 20, 1999Date of Patent: September 28, 2004Assignee: Sony CorporationInventors: Chihiro Motono, Koji Okumoto, Toshitaka Yoshihiro, Masaya Nakatani, Masatoshi Sase, Hidehiko Teshirogi, Seishin Asato