Abstract: Embodiments of the present disclosure provide a patterning method and a semiconductor structure. The method includes: providing a substrate, wherein the substrate includes adjacent storage regions and peripheral circuit regions; forming, on the substrate, a pattern transfer layer, the pattern transfer layer having a plurality of first hard masks, wherein the first hard masks extend along a first direction and are spaced apart from each other; forming a barrier layer on the pattern transfer layer; forming, on the barrier layer, a plurality of second hard masks, the plurality of second hard masks extending along a second direction, wherein the second hard masks are spaced apart from each other, and the second hard masks are located in the storage regions and second hard masks close to the peripheral circuit regions have structural defects.

Abstract: A method for manufacturing a semiconductor structure includes: a first mask layer is formed on a dielectric layer, in which a first etching hole extending along a first direction parallel to the dielectric layer is formed in the first mask layer; a side of the first mask layer away from the dielectric layer is planarized; a second mask layer is formed on the first mask layer, in which a second etching hole extending along a second direction parallel to the dielectric layer is formed in the second mask layer, the first etching hole and the second etching hole constitute an etching hole; and the dielectric layer is etched along the etching hole to form the capacitor hole.

Abstract: The present disclosure discloses a capacitor structure and its formation method and a memory. The method includes: providing a substrate; forming an electrode support structure on the substrate in a stacking fashion, wherein the electrode support structure includes at least a first support layer on its top, a capacitor hole is formed at intervals within the electrode support structure and extends upwards in a direction perpendicular to a surface of the substrate; forming, within the capacitor hole, an electrode post and an electrode layer extending from the electrode post to the upper surface of the first support layer; removing the electrode layer; removing the first support layer; forming a dielectric layer on the top of the electrode support structure, wherein the dielectric layer covers the top of the electrode post, and an outer peripheral wall of the top of the electrode post is connected with the dielectric layer.

Abstract: The present invention provides a bottom-hole impact-rotation stepping combined unloading rock-breaking efficient drilling system, including a housing, a drive assembly, a universal joint, a transmission shaft, a rotational impact assembly, and a drill bit; the transmission shaft is connected with the housing; the rotational impact assembly includes a rotational transmission assembly for conveying a rotational power to the drill bit and an impact assembly for providing a high frequency axial impact power to the drill bit; when the rotational transmission assembly rotates along with the transmission shaft, the impact assembly applies a high frequency impact force along a drilling axial direction to the rotational transmission assembly; an annular drill bit is disposed at an outer end of a drill bit body of the drill bit; a central drill bit is slidably disposed on an inner ring end surface of the annular drill bit; an inwardly-recessed cylindrical region is formed between a head end of the annular drill bit and

Abstract: A piston limiting structure, including: a cylinder, a piston, and a flange provided with a limiting piece, the cylinder has a piston hole perpendicular to an axial direction of the cylinder and penetrating through the cylinder, and a projection of the piston hole in a penetrating direction is circular. The piston is disposed in the piston hole in a form-fit manner and is slid in the piston hole in a reciprocating manner. A side wall of the piston is provided with a thrust groove, a bottom surface of the thrust groove forms a thrust surface on the side wall of the piston, and the thrust groove does not penetrate through two ends of the side wall of the piston along an axial length of the piston. The limiting piece abuts against the thrust surface.

Abstract: Embodiments of the present application disclose a protective case for a portable electronic device, which includes a rear shell and a camera decorative ring, the rear shell includes a back plate and a clamping element, the back plate is provided with an avoidance hole, and the inner wall surface of the avoidance hole is provided with a first retention groove, the outer peripheral surface of the camera decorative ring is provided with a limit surface, and a limit part is formed between the limit surface and the inner end surface of the camera decorative ring; the limit part is embedded in the first retention groove, and the inner end surface of the camera decorative ring is evenly aligned with or lower than the inner surface of the back plate.

Abstract: A processing blade is assigned from the plurality of processing blades to a session of data packets. The load balancing engine manages a session table and an IPsec routing table by updating the session table with a particular security engine card assigned to the session and by updating the IPsec routing table for storing a remote IP address for a particular session. Outbound raw data packets of a particular session are parsed for matching cleartext tuple information prior to IPsec encryption, and inbound encrypted data packets of the particular session are parsed for matching cipher tuple information prior to IPsec decryption. Inbound data packets assigned to the processing blade from the session table are parsed and forwarded to the station.

Abstract: A new variable selective etching technology for thick SOI devices. An SOI material is etched by the following steps: (1) providing an SOI wafer; (2) depositing a composite hard mask with a variable selection ratio to replace a traditional hard mask with an invariable selection ratio; (3) applying a photoresist; (4) mask making, namely defining a to-be-etched region by using a photoetching plate; (5) etching the photoresist in the defined region; (6) etching the composite hard mask; (7) removing the photoresist; (8) etching top silicon by using a second etching method at a first selection ratio; and (9) etching a buried oxide layer by using a third etching method at a second selection ratio. The new variable selective etching technology avoids the damage to a side wall of a deep trench when the buried oxide layer is etched, and does not need to use an excessive thick hard mask.

Abstract: Aspects of the invention include systems and methods configured to prevent masquerading service attacks. A non-limiting example computer-implemented method includes sending, from a first server in a cloud environment, a communication request comprising an application programming interface (API) key and a first server identifier to an identity and access management (IAM) server of the cloud environment. The API key can be uniquely assigned by the IAM server to a first component of the first server. The first server receives a credential that includes a token for the first component and sends the credential to a second server. The second server sends the credential, a second server identifier, and an identifier for a second component of the second server to the IAM server. The second server receives an acknowledgment from the IAM server and sends the acknowledgment to the first server.

Abstract: The present invention provides a bottom-hole impact-rotation stepping combined unloading rock-breaking efficient drilling system, including a housing, a drive assembly, a universal joint, a transmission shaft, a rotational impact assembly, and a drill bit; the transmission shaft is connected with the housing; the rotational impact assembly includes a rotational transmission assembly for conveying a rotational power to the drill bit and an impact assembly for providing a high frequency axial impact power to the drill bit; when the rotational transmission assembly rotates along with the transmission shaft, the impact assembly applies a high frequency impact force along a drilling axial direction to the rotational transmission assembly; an annular drill bit is disposed at an outer end of a drill bit body of the drill bit; a central drill bit is slidably disposed on an inner ring end surface of the annular drill bit; an inwardly-recessed cylindrical region is formed between a head end of the annular drill bit and

Abstract: Disclosed is a massive data-driven method for automatically locating a mine microseismic source, including: constructing a microseismic wave calibration data set by using a large-scale seismic data set containing seismic signals and non-seismic signals; constructing a pre-training calibration model based on a full convolution neural network through deep learning of a seismic wave calibration data set; using microseismic data of mine sites for transfer learning of an initial arrival time calibration model to construct an arrival time automatic calibration model suitable for mine microseismic signals; and automatically as well as accurately locating mine microseismic events based on an isokinetic homogeneous isotropic velocity model by using an optimization algorithm to deduce arrival time errors and through repeated iteration and fine-tuning.

Abstract: Provided are an interaction method and apparatus, an electronic device, a storage medium, and a program product. The method includes displaying a gift panel in response to a gift panel display operation for a target object, where the gift panel is configured for a gifting user to select a recipient user corresponding to the target object, the gifting user includes a target user, and the target object is configured to establish, for the recipient user, a first association relationship between the recipient user and the target user; and sending a target gift request to a server in response to a gift operation acting in the gift panel.

Abstract: Disclosed are an array substrate and a display panel, including: a base substrate; and a wiring layer, an anode layer, and a light-emitting layer which are stacked on the base substrate sequentially, wherein the wiring layer includes a signal wiring, a first wiring and a second wiring, a projection of the first wiring on the base substrate is separated from a projection of the second wiring on the base substrate, the first and second wirings are respectively disposed on two sides of the anode layer below the anode layer, the signal wiring is between the first and second wirings, the projections of the first and second wirings on the base substrate respectively overlap projections of two sides of the anode layer on the base substrate, and a length of the second wiring is less than that of the signal wiring in an extension direction of the signal wiring.

Abstract: A vertical light emitting diode die packaging method is provided, including a plurality of following steps. At first, a plurality of drill hole is formed in a substrate and a first metal material is used to fill the drill holes. Next, disposing and fixing a plurality of vertical light emitting diode die on the substrate through a second metal material, and a transparent glue is used to cover thereon. A laser process is then employed to dissolve the transparent glue for forming ditches. And, a conductive liquid is applied to fill the ditches and an insulating glue is provided to embrace and encapsulate the vertical light emitting diode dies. By employing the packaging method of the present invention, the current external wire bonding process can be effectively replaced, thereby die size miniaturization as well as packaging yield of the vertical light emitting diode dies are believed to be optimized.

Abstract: A solid-state laser radar, including: a plurality of emission modules, each emission module including at least one light-emitting unit, and the light-emitting unit including a plurality of lasers configured to emit detection beams at the same time; and a receiving module, including at least one detection unit, the detection unit including a plurality of photodetectors configured to receive echoes, reflected by a target object, of the detection beams, the plurality of emission modules are disposed around the receiving module, the light-emitting units of the plurality of emission modules are located on a same plane, and one detection unit is configured to receive echoes, reflected by the target object, of the detection beams emitted by the light-emitting units of the plurality of emission modules. For a set range of field angles, the lengths of the light-emitting units emitting light simultaneously are greatly reduced by providing the plurality of emission modules.

Abstract: A bonding and transferring method for die package structures is provided, including providing a die package structure which has a positioning adhesive disposed thereon, and providing a vibration base having at least one cavity corresponding to the positioning adhesive. By alignment of the positioning adhesive and the cavity, the die package structure can be positioned into the vibration base. A target substrate is further provided and bonded with the vibration base having the die package structure disposed thereon through a metal material. And a laser process is then performed to melt the metal material. At last, the vibration base and the positioning adhesive are removed so the die package structure is successfully bonded and transferred onto the target substrate. By employing the proposed process method of the present invention, rapid mass transfer result is accomplished, and the packaging yield of vertical light emitting diode die package structures is optimized.

Abstract: A via-filling method of a TGV substrate includes steps: filling a plurality of metal balls into a plurality of vias of the TGV substrate; using a heating process to melt the plurality of metal balls to form a liquid-state metal; and cooling down the liquid-state metal to form a solid-state metal inside the plurality of vias. Because the method needn't use solvents or fluxes, the solid-state metal inside the plurality of vias have better electric conductivity.

Abstract: A manufacturing method of a semiconductor structure is disclosed, which includes: an initial structure is provided; a filling layer covering a spacer is formed on the initial structure; a filling layer with a first preset thickness is removed at a high first etching rate through a first etching process, then a filling layer with a second preset thickness is removed at a low second etching rate through a second etching process, and the partial spacer is exposed; and the filling layer and the spacer are patterned.

Abstract: An over-current protection circuit for composite transistor devices is provided, connected between an input terminal and a load, and including: a control-terminal voltage-generation module whose output voltage varies with its input voltage when driven by a first voltage, wherein the output voltage of the control-terminal voltage-generation module serves as a control-terminal voltage; a composite transistor device, connected between the control-terminal voltage-generation module and the load, configured to conduct in response to the control-terminal voltage and a second voltage to generate an output current flowing through the load; and an over-current protection module, connected between the composite transistor device and the load, wherein when the output current of the composite transistor device exceeds a preset limit, a clamping voltage is applied to the composite transistor device by the over-current protection module to limit a current flowing through the composite transistor device, thereby limiting th

Abstract: An LED circuit board structure includes first color LEDs, second color LEDs, third color LEDs, integrated circuit chips, a carrier board, first P-type pads, first color pads, first testing wires and first connecting wires. One of the first P-type pads is disposed at a pixel-front-side-pattern region for mounting a first P-type electrode. One of the first color pads is disposed at the pixel-front-side-pattern region for mounting a first pin of the integrated circuit chip. The first color pad electrically connects to the first P-type pad. A first testing wire is disposed at the pixel-front-side-pattern region and extends from the first P-type pad or the first color pad. The first connecting wire electrically connects two first testing wires in adjacent two pixel-front-side-pattern regions in parallel.