Abstract: A perovskite solar cell and a method for manufacturing the same are provided. The method includes: sputtering a compact layer onto a light transmitting electrode, in which the compact layer has a thickness ranging from 20 nm to 120 nm, and a material of the compact layer is titanium dioxide; sputtering a roughened layer onto the compact layer, in which the roughened layer has a thickness ranging from 20 nm to 30 nm, and a material of the roughened layer is titanium dioxide; disposing a perovskite layer onto the roughened layer; disposing a hole transporting layer onto the perovskite layer; and disposing a back electrode onto the hole transporting layer.

Abstract: A composite electrode structure and a method for manufacturing the same are provided. The composite electrode structure is used as a back electrode of a perovskite solar cell. The composite electrode structure includes a first conductive layer and a second conductive layer. The first conductive layer is used to connect with an electron transporting layer or a hole transporting layer. A material of the first conductive layer is a first light transmitting conductive oxide. The second conductive layer is disposed on the first conductive layer. A material of the second conductive layer is a second light transmitting conductive oxide or a conductive metal.

Abstract: A piston limiting structure, including: a cylinder, a piston, and a flange provided with a limiting piece, the cylinder has a piston hole perpendicular to an axial direction of the cylinder and penetrating through the cylinder, and a projection of the piston hole in a penetrating direction is circular. The piston is disposed in the piston hole in a form-fit manner and is slid in the piston hole in a reciprocating manner. A side wall of the piston is provided with a thrust groove, a bottom surface of the thrust groove forms a thrust surface on the side wall of the piston, and the thrust groove does not penetrate through two ends of the side wall of the piston along an axial length of the piston. The limiting piece abuts against the thrust surface.

Abstract: The present invention provides a bottom-hole impact-rotation stepping combined unloading rock-breaking efficient drilling system, including a housing, a drive assembly, a universal joint, a transmission shaft, a rotational impact assembly, and a drill bit; the transmission shaft is connected with the housing; the rotational impact assembly includes a rotational transmission assembly for conveying a rotational power to the drill bit and an impact assembly for providing a high frequency axial impact power to the drill bit; when the rotational transmission assembly rotates along with the transmission shaft, the impact assembly applies a high frequency impact force along a drilling axial direction to the rotational transmission assembly; an annular drill bit is disposed at an outer end of a drill bit body of the drill bit; a central drill bit is slidably disposed on an inner ring end surface of the annular drill bit; an inwardly-recessed cylindrical region is formed between a head end of the annular drill bit and

Abstract: The present disclosure provides a pump body assembly, a heat exchange apparatus, a fluid machine and an operating method thereof. The pump body assembly includes a piston, a shaft, a piston sheath, and a cylinder. The shaft drives the piston to rotate and reciprocate within the piston sheath while rotating. The piston sheath is located in the cylinder, and a compression chamber is defined between an outer circumferential wall of the piston and an inner wall of the cylinder. A pressure relief recess is defined in the outer circumferential wall of the piston or the inner wall of the cylinder at a position corresponding to the compression chamber.

Abstract: Aspects of the invention include systems and methods configured to prevent masquerading service attacks. A non-limiting example computer-implemented method includes sending, from a first server in a cloud environment, a communication request comprising an application programming interface (API) key and a first server identifier to an identity and access management (IAM) server of the cloud environment. The API key can be uniquely assigned by the IAM server to a first component of the first server. The first server receives a credential that includes a token for the first component and sends the credential to a second server. The second server sends the credential, a second server identifier, and an identifier for a second component of the second server to the IAM server. The second server receives an acknowledgment from the IAM server and sends the acknowledgment to the first server.

Abstract: The present invention provides a bottom-hole impact-rotation stepping combined unloading rock-breaking efficient drilling system, including a housing, a drive assembly, a universal joint, a transmission shaft, a rotational impact assembly, and a drill bit; the transmission shaft is connected with the housing; the rotational impact assembly includes a rotational transmission assembly for conveying a rotational power to the drill bit and an impact assembly for providing a high frequency axial impact power to the drill bit; when the rotational transmission assembly rotates along with the transmission shaft, the impact assembly applies a high frequency impact force along a drilling axial direction to the rotational transmission assembly; an annular drill bit is disposed at an outer end of a drill bit body of the drill bit; a central drill bit is slidably disposed on an inner ring end surface of the annular drill bit; an inwardly-recessed cylindrical region is formed between a head end of the annular drill bit and

Abstract: A broadcaster, system, and method for reducing test data volume and test application time in an ATE (automatic test equipment) in a scan-based integrated circuit. The scan-based integrated circuit contains multiple scan chains, each scan chain comprising multiple scan cells coupled in series. The broadcaster is a combinational logic network coupled to an optional virtual scan controller and an optional scan connector. The virtual scan controller controls the operation of the broadcaster. The system transmits virtual scan patterns stored in the ATE and generates broadcast scan patterns through the broadcaster for testing manufacturing faults in the scan-based integrated circuit. The number of scan chains that can be supported by the ATE is significantly increased. Methods are further proposed to reorder scan cells in selected scan chains, to generate the broadcast scan patterns and virtual scan patterns, and to synthesize the broadcaster and a compactor in the scan-based integrated circuit.

Abstract: A monitoring device comprising a plurality of emitters and a plurality of receivers is provided. The emitters are capable of being driven to emit waves with directivity. The receivers are correspondingly disposed with respect to the emitters for receiving the waves. The transmitting paths of the waves define a monitoring area. The monitoring device is able to determine the moving trend and the location of the first object in the monitoring area when the specific waves are reflected to and received by the corresponding receivers.

Abstract: A monitoring device comprising a plurality of emitters and a plurality of receivers is provided. The emitters are capable of being driven to emit waves with directivity. The receivers are correspondingly disposed with respect to the emitters for receiving the waves. The transmitting paths of the waves define a monitoring area. The monitoring device is able to determine the moving trend and the location of the first object in the monitoring area when the specific waves are reflected to and received by the corresponding receivers.

Abstract: A hostless automobile reverse radar warning system installed to an automobile includes a reverse signal light power module for supplying an electric power required by the system, a plurality of distance sensing modules installed to an external periphery of the automobile for performing a distance detection to detect external environment conditions of the automobile, producing a distance detection result, and generating a warning signal based on the distance detection result, and a warning module for receiving the warning signal and producing a sound to alert a driver based on the warning signal.

Abstract: A hostless automobile reverse radar warning system installed to an automobile includes a reverse signal light power module for supplying an electric power required by the system, a plurality of distance sensing modules installed to an external periphery of the automobile for performing a distance detection to detect external environment conditions of the automobile, producing a distance detection result, and generating a warning signal based on the distance detection result, and a warning module for receiving the warning signal and producing a sound to alert a driver based on the warning signal.

Abstract: A broadcaster, system, and method for reducing test data volume and test application time in an ATE (automatic test equipment) in a scan-based integrated circuit. The scan-based integrated circuit contains multiple scan chains, each scan chain comprising multiple scan cells coupled in series. The broadcaster is a combinational logic network coupled to an optional virtual scan controller and an optional scan connector. The virtual scan controller controls the operation of the broadcaster. The system transmits virtual scan patterns stored in the ATE and generates broadcast scan patterns through the broadcaster for testing manufacturing faults in the scan-based integrated circuit. The number of scan chains that can be supported by the ATE is significantly increased. Methods are further proposed to reorder scan cells in selected scan chains, to generate the broadcast scan patterns and virtual scan patterns, and to synthesize the broadcaster and a compactor in the scan-based integrated circuit.

Abstract: A broadcaster, system, and method for reducing test data volume and test application time in an ATE (automatic test equipment) in a scan-based integrated circuit. The scan-based integrated circuit contains multiple scan chains, each scan chain comprising multiple scan cells coupled in series. The broadcaster is a combinational logic network coupled to an optional virtual scan controller and an optional scan connector. The virtual scan controller controls the operation of the broadcaster. The system transmits virtual scan patterns stored in the ATE and generates broadcast scan patterns through the broadcaster for testing manufacturing faults in the scan-based integrated circuit. The number of scan chains that can be supported by the ATE is significantly increased. Methods are further proposed to reorder scan cells in selected scan chains, to generate the broadcast scan patterns and virtual scan patterns, and to synthesize the broadcaster and a compactor in the scan-based integrated circuit.

Abstract: An inkjet printing process for a circuit board includes the following procedures. Firstly, a substrate and a conductive layer disposed on the substrate are provided. Afterward, a roughening treatment is performed on the conductive layer so that the roughness of the conductive layer is between 0.1 ?m and 5 ?m. Then, a patterned mask layer is printed on the conductive layer for covering an area of the conductive layer prepared for forming a circuit pattern.

Abstract: A broadcaster, system, and method for reducing test data volume and test application time in an ATE (automatic test equipment) in a scan-based integrated circuit. The scan-based integrated circuit contains multiple scan chains, each scan chain comprising multiple scan cells coupled in series. The broadcaster is a combinational logic network coupled to an optional virtual scan controller and an optional scan connector. The virtual scan controller controls the operation of the broadcaster. The system transmits virtual scan patterns stored in the ATE and generates broadcast scan patterns through the broadcaster for testing manufacturing faults in the scan-based integrated circuit. The number of scan chains that can be supported by the ATE is significantly increased. Methods are further proposed to reorder scan cells in selected scan chains, to generate the broadcast scan patterns and virtual scan patterns, and to synthesize the broadcaster and a compactor in the scan-based integrated circuit.

Abstract: A method and apparatus for inserting design-for-debug (DFD) circuitries in an integrated circuit to debug or diagnose DFT modules, including scan cores, memory BIST (built-in self-test) cores, logic BIST cores, and functional cores. The invention further comprises using a DFD controller for executing a plurality of DFD commands to debug or diagnosis the DFT modules embedded with the DFD circuitries. When used alone or combined together, these DFD commands will detect or locate physical failures in the DFT modules in the integrated circuit on an evaluation board or system using a low-cost DFT debugger. A computer-aided design (CAD) method is further developed to synthesize the DFD controller and DFD circuitries according to the IEEE 1149.1 Boundary-scan Std. The DFD controller supports, but is not limited to, the following DFD commands: RUN_SCAN, RUN_MBIST, RUN_LBIST, DBG_SCAN, DBG_MBIST, DBG_LBIST, DBG_FUNCTION, SELECT, SHIFT, SHIFT_CHAIN, CAPTURE, RESET, BREAK, RUN, STEP, and STOP.

Abstract: A broadcaster, system, and method for reducing test data volume and test application time in an ATE (automatic test equipment) in a scan-based integrated circuit. The scan-based integrated circuit contains multiple scan chains, each scan chain comprising multiple scan cells coupled in series. The broadcaster is a combinational logic network coupled to an optional virtual scan controller and an optional scan connector. The virtual scan controller controls the operation of the broadcaster. The system transmits virtual scan patterns stored in the ATE and generates broadcast scan patterns through the broadcaster for testing manufacturing faults in the scan-based integrated circuit. The number of scan chains that can be supported by the ATE is significantly increased. Methods are further proposed to reorder scan cells in selected scan chains, to generate the broadcast scan patterns and virtual scan patterns, and to synthesize the broadcaster and a compactor in the scan-based integrated circuit.

Abstract: A method and apparatus for inserting design-for-debug (DFD) circuitries in an integrated circuit to debug or diagnose DFT modules, including scan cores, memory BIST (built-in self-test) cores, logic BIST cores, and functional cores. The invention further comprises using a DFD controller for executing a plurality of DFD commands to debug or diagnosis the DFT modules embedded with the DFD circuitries. When used alone or combined together, these DFD commands will detect or locate physical failures in the DFT modules in the integrated circuit on an evaluation board or system using a low-cost DFT debugger. A computer-aided design (CAD) method is further developed to synthesize the DFD controller and DFD circuitries according to the IEEE 1149.1 Boundary-scan Std. The DFD controller supports, but is not limited to, the following DFD commands: RUN_SCAN, RUN_MBIST, RUN_LBIST, DBG_SCAN, DBG_MBIST, DBG_LBIST, DBG_FUNCTION, SELECT, SHIFT, SHIFT_CHAIN, CAPTURE, RESET, BREAK, RUN, STEP, and STOP.