Patents by Inventor Seng Kim Dalson Ye
Seng Kim Dalson Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11239128Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: GrantFiled: August 16, 2019Date of Patent: February 1, 2022Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 10861824Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.Type: GrantFiled: November 28, 2018Date of Patent: December 8, 2020Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong
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Patent number: 10811387Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.Type: GrantFiled: November 19, 2018Date of Patent: October 20, 2020Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Hong Wan Ng
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Publication number: 20190371693Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: ApplicationFiled: August 16, 2019Publication date: December 5, 2019Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 10431513Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: GrantFiled: May 1, 2017Date of Patent: October 1, 2019Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 10304808Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.Type: GrantFiled: June 27, 2018Date of Patent: May 28, 2019Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Hong Wan Ng
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Publication number: 20190096857Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.Type: ApplicationFiled: November 28, 2018Publication date: March 28, 2019Inventors: Seng Kim Dalson Ye, Chin Hui Chong
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Publication number: 20190088627Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.Type: ApplicationFiled: November 19, 2018Publication date: March 21, 2019Inventors: Seng Kim Dalson Ye, Hong Wan Ng
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Patent number: 10153254Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.Type: GrantFiled: January 30, 2017Date of Patent: December 11, 2018Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong
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Publication number: 20180315736Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.Type: ApplicationFiled: June 27, 2018Publication date: November 1, 2018Inventors: Seng Kim Dalson Ye, Hong Wan Ng
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Patent number: 10014281Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.Type: GrantFiled: August 28, 2017Date of Patent: July 3, 2018Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Hong Wan Ng
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Publication number: 20170358559Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.Type: ApplicationFiled: August 28, 2017Publication date: December 14, 2017Inventors: Seng Kim Dalson Ye, Hong Wan Ng
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Publication number: 20170301598Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: ApplicationFiled: May 1, 2017Publication date: October 19, 2017Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 9761562Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.Type: GrantFiled: May 6, 2015Date of Patent: September 12, 2017Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Hong Wan Ng
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Publication number: 20170141085Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.Type: ApplicationFiled: January 30, 2017Publication date: May 18, 2017Inventors: Seng Kim Dalson Ye, Chin Hui Chong
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Patent number: 9640458Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: GrantFiled: August 27, 2014Date of Patent: May 2, 2017Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 9583476Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.Type: GrantFiled: February 22, 2016Date of Patent: February 28, 2017Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong
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Publication number: 20160329303Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.Type: ApplicationFiled: May 6, 2015Publication date: November 10, 2016Inventors: Seng Kim Dalson Ye, Hong Wan Ng
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Publication number: 20160172349Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.Type: ApplicationFiled: February 22, 2016Publication date: June 16, 2016Inventors: Seng Kim Dalson Ye, Chin Hui Chong
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Patent number: 9299684Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.Type: GrantFiled: August 27, 2013Date of Patent: March 29, 2016Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong