Patents by Inventor Seng Kim Dalson Ye

Seng Kim Dalson Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11239128
    Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: February 1, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
  • Patent number: 10861824
    Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: December 8, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong
  • Patent number: 10811387
    Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.
    Type: Grant
    Filed: November 19, 2018
    Date of Patent: October 20, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Hong Wan Ng
  • Publication number: 20190371693
    Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.
    Type: Application
    Filed: August 16, 2019
    Publication date: December 5, 2019
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
  • Patent number: 10431513
    Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: October 1, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
  • Patent number: 10304808
    Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: May 28, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Hong Wan Ng
  • Publication number: 20190096857
    Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.
    Type: Application
    Filed: November 28, 2018
    Publication date: March 28, 2019
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong
  • Publication number: 20190088627
    Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.
    Type: Application
    Filed: November 19, 2018
    Publication date: March 21, 2019
    Inventors: Seng Kim Dalson Ye, Hong Wan Ng
  • Patent number: 10153254
    Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: December 11, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong
  • Publication number: 20180315736
    Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.
    Type: Application
    Filed: June 27, 2018
    Publication date: November 1, 2018
    Inventors: Seng Kim Dalson Ye, Hong Wan Ng
  • Patent number: 10014281
    Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: July 3, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Hong Wan Ng
  • Publication number: 20170358559
    Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.
    Type: Application
    Filed: August 28, 2017
    Publication date: December 14, 2017
    Inventors: Seng Kim Dalson Ye, Hong Wan Ng
  • Publication number: 20170301598
    Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.
    Type: Application
    Filed: May 1, 2017
    Publication date: October 19, 2017
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
  • Patent number: 9761562
    Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.
    Type: Grant
    Filed: May 6, 2015
    Date of Patent: September 12, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Hong Wan Ng
  • Publication number: 20170141085
    Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.
    Type: Application
    Filed: January 30, 2017
    Publication date: May 18, 2017
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong
  • Patent number: 9640458
    Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: May 2, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
  • Patent number: 9583476
    Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: February 28, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong
  • Publication number: 20160329303
    Abstract: Semiconductor device packages include a stack of semiconductor memory devices positioned over an interposer substrate, a controller element, and a redistribution substrate positioned laterally adjacent to the controller element. At least a portion of the controller element is positioned directly between the stack and the interposer substrate. The controller element is operatively connected to the semiconductor memory devices of the stack through the redistribution substrate and the interposer substrate. Methods of manufacturing a semiconductor device package include positioning a redistribution substrate laterally adjacent to a controller element and attaching the redistribution substrate and the controller element to an interposer substrate. A stack of semiconductor memory devices is positioned over the controller element and the redistribution substrate.
    Type: Application
    Filed: May 6, 2015
    Publication date: November 10, 2016
    Inventors: Seng Kim Dalson Ye, Hong Wan Ng
  • Publication number: 20160172349
    Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.
    Type: Application
    Filed: February 22, 2016
    Publication date: June 16, 2016
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong
  • Patent number: 9299684
    Abstract: A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: March 29, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Seng Kim Dalson Ye, Chin Hui Chong