Patents by Inventor Seo-Jin JEONG
Seo-Jin JEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11990552Abstract: A semiconductor device includes an active pattern which includes a lower pattern, and a sheet pattern that is spaced apart from the lower pattern in a first direction, a gate structure on the lower pattern that includes a gate electrode that surrounds the sheet pattern, the gate electrode extending in a second direction that is perpendicular to the first direction, and a source/drain pattern on the lower pattern and in contact with the sheet pattern. A contact surface between the sheet pattern and the source/drain pattern has a first width in the second direction, and the sheet pattern has a second width in the second direction that is greater than the first width.Type: GrantFiled: November 23, 2021Date of Patent: May 21, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Ryong Ha, Seok Hoon Kim, Jung Taek Kim, Pan Kwi Park, Moon Seung Yang, Seo Jin Jeong
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Publication number: 20240117405Abstract: The present invention relates to a colorimetric biosensor, preparation method thereof, and antibiotic susceptibility testing method using the same, and more specifically, in the present invention, it is possible to prepare a colorimetric biosensor comprising a porous hydrogel structure including polydiacetylene and a hydrogel polymer (alginate, PEG-DA, etc.); and a microbial nutrient source, and it may be applied to a colorimetric biosensor for detecting microorganisms or a method for testing antibiotic susceptibility of microorganisms for allowing in real-time measurement and exhibiting excellent sensitivity using the colorimetric biosensor.Type: ApplicationFiled: December 21, 2022Publication date: April 11, 2024Inventors: Tae Joon Jeon, Sun Min Kim, Hui Soo Jang, Woo Jin Jeong, Seo Yoon Song
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Patent number: 11942551Abstract: A semiconductor device includes a multi-channel active pattern, a plurality of gate structures on the multi-channel active pattern and spaced apart from each other in a first direction, the plurality of gate structures including a gate electrode that extends in a second direction different from the first direction, a source/drain recess between the adjacent gate structures, and a source/drain pattern on the multi-channel active pattern in the source/drain recess, wherein the source/drain pattern includes: a semiconductor liner layer including silicon-germanium and extending along the source/drain recess, a semiconductor filling layer including silicon-germanium on the semiconductor liner layer, and at least one or more semiconductor insertion layers between the semiconductor liner layer and the semiconductor filling layer, and wherein the at least one or more semiconductor insertion layers have a saddle structure.Type: GrantFiled: November 5, 2021Date of Patent: March 26, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Jung Taek Kim, Seok Hoon Kim, Pan Kwi Park, Moon Seung Yang, Seo Jin Jeong, Min-Hee Choi, Ryong Ha
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Patent number: 11932861Abstract: A recombinant vector according to an embodiment is for genome editing without inserting a replicon into the plant genome in a T0 generation plant. The recombinant vector includes a geminivirus-based replicon between the sequence of LB (left border) and sequence of RB (right border) of Ti plasmid. A method of genome editing without inserting a replicon into the plant genome in a T0 generation plant according to an embodiment includes transforming a plant cell by inserting a foreign gene to the aforementioned recombinant vector.Type: GrantFiled: September 10, 2019Date of Patent: March 19, 2024Assignee: INDUSTRY-ACADEMIC COOPERATION FOUNDATION GYEONGSANG NATIONAL UNIVERSITYInventors: Jae Yean Kim, Tien Van Vu, Jihae Kim, Se Jeong Jeong, Hyun Jeong Kim, Seo-Jin Park, Mil Thi Tran, Velu Sivankalyani, Yeon Woo Sung, Thi Hai Duong Doan, Dibyajyoti Pramanik, Mahadev Rahul Shelake, Geon Hui Son
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Publication number: 20240021675Abstract: A semiconductor device includes: first and second channel structures spaced apart from each other in a first direction; and a source/drain pattern, between the first and second channel structures, including a first interface contacting the first channel structure and a second interface contacting the second channel structure, wherein, in a plan view, the source/drain pattern includes first and second side walls opposite to each other in a second direction, the first side wall includes a first sloped side wall, a second sloped side wall, and a first horizontal intersection at which the first and second sloped side walls meet, a width of the first interface is different from a width of the second interface, in the second direction, and a distance from the first interface to the first horizontal intersection is greater than a distance from the second interface to the first horizontal intersection, in the first direction.Type: ApplicationFiled: March 23, 2023Publication date: January 18, 2024Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Nam Kyu CHO, Seok Hoon KIM, Jung Taek KIM, Pan Kwi PARK, Seo Jin JEONG
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Publication number: 20220190134Abstract: A semiconductor device includes an active pattern including a lower pattern and a plurality of sheet patterns; a gate structure disposed on the lower pattern and surrounding the plurality of sheet patterns; and a source/drain pattern filling a source/drain recess formed on one side of the gate structure. The source/drain pattern includes a first semiconductor pattern extending along the source/drain recess and contacting the lower pattern, a second and third semiconductor patterns sequentially disposed on the first semiconductor pattern, a lower surface of the third semiconductor pattern is disposed below a lower surface of a lowermost sheet pattern, a side surface of the third semiconductor pattern includes a planar portion, and a thickness of the second semiconductor pattern on the lower surface of the third semiconductor pattern is different from a thickness of the second semiconductor pattern on the planar portion of the side surface of the third semiconductor pattern.Type: ApplicationFiled: August 30, 2021Publication date: June 16, 2022Inventors: SEO JIN JEONG, Do Hyun GO, Seok Hoon KIM, Jung Taek KIM, Pan Kwi PARK, Moon Seung YANG, Min-Hee CHOI, Ryong HA
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Publication number: 20220190168Abstract: A semiconductor device includes a multi-channel active pattern, a plurality of gate structures on the multi-channel active pattern and spaced apart from each other in a first direction, the plurality of gate structures including a gate electrode that extends in a second direction different from the first direction, a source/drain recess between the adjacent gate structures, and a source/drain pattern on the multi-channel active pattern in the source/drain recess, wherein the source/drain pattern includes: a semiconductor liner layer including silicon-germanium and extending along the source/drain recess, a semiconductor filling layer including silicon-germanium on the semiconductor liner layer, and at least one or more semiconductor insertion layers between the semiconductor liner layer and the semiconductor filling layer, and wherein the at least one or more semiconductor insertion layers have a saddle structure.Type: ApplicationFiled: November 5, 2021Publication date: June 16, 2022Inventors: Jung Taek Kim, Seok Hoon Kim, Pan Kwi Park, Moon Seung Yang, Seo Jin Jeong, Min-Hee Choi, Ryong Ha
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Publication number: 20220181500Abstract: A semiconductor device includes an active pattern which includes a lower pattern, and a sheet pattern that is spaced apart from the lower pattern in a first direction, a gate structure on the lower pattern that includes a gate electrode that surrounds the sheet pattern, the gate electrode extending in a second direction that is perpendicular to the first direction, and a source/drain pattern on the lower pattern and in contact with the sheet pattern. A contact surface between the sheet pattern and the source/drain pattern has a first width in the second direction, and the sheet pattern has a second width in the second direction that is greater than the first width.Type: ApplicationFiled: November 23, 2021Publication date: June 9, 2022Inventors: Ryong Ha, Seok Hoon Kim, Jung Taek Kim, Pan Kwi Park, Moon Seung Yang, Seo Jin Jeong
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Patent number: 9972717Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device comprises a first multi-channel active pattern which is defined by a field insulating layer, extends along a first direction, and includes a first portion and a second portion; a gate electrode which extends along a second direction different from the first direction and is formed on the first portion; and a first source/drain region which is formed around the second portion protruding further upward than a top surface of the field insulating layer and contacts the field insulating layer, wherein the second portion is disposed on both sides of the first portion in the first direction and is more recessed than the first portion, a top surface of the first portion and a top surface of the second portion protrude further upward than the top surface of the field insulating layer, and a profile of sidewalls of the second portion is continuous.Type: GrantFiled: August 4, 2016Date of Patent: May 15, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Yeong-Jong Jeong, Jeong-Yun Lee, Geo-Myung Shin, Dong-Suk Shin, Si-Hyung Lee, Seo-Jin Jeong
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Publication number: 20160343859Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device comprises a first multi-channel active pattern which is defined by a field insulating layer, extends along a first direction, and includes a first portion and a second portion; a gate electrode which extends along a second direction different from the first direction and is formed on the first portion; and a first source/drain region which is formed around the second portion protruding further upward than a top surface of the field insulating layer and contacts the field insulating layer, wherein the second portion is disposed on both sides of the first portion in the first direction and is more recessed than the first portion, a top surface of the first portion and a top surface of the second portion protrude further upward than the top surface of the field insulating layer, and a profile of sidewalls of the second portion is continuous.Type: ApplicationFiled: August 4, 2016Publication date: November 24, 2016Applicant: Samsung Electronics Co., Ltd.Inventors: Yeong-Jong JEONG, Jeong-Yun Lee, Geo-Myung Shin, Dong-Suk Shin, Si-Hyung Lee, Seo-Jin Jeong
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Patent number: 9431478Abstract: A semiconductor device includes a first multi-channel active pattern defined by a field insulating layer and extending along a first direction, the first multi-channel active pattern including a first portion having a top surface protruding further in an upward direction than a top surface of the field insulating layer and a second portion on both sides of the first portion, the second portion having sidewalls with a continuous profile and a top surface protruding further in the upward direction than the top surface of the field insulating layer and protruding in the upward direction less than the top surface of the first portion, a gate electrode on the first portion of the first multi-channel active pattern and extending along a second direction different from the first direction, and a first source/drain region on the second portion of the first multi-channel active pattern and contacting the field insulating layer.Type: GrantFiled: January 20, 2015Date of Patent: August 30, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Yeong-Jong Jeong, Jeong-Yun Lee, Geo-Myung Shin, Dong-Suk Shin, Si-Hyung Lee, Seo-Jin Jeong
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Publication number: 20150318399Abstract: A semiconductor device includes a first multi-channel active pattern defined by a field insulating layer and extending along a first direction, the first multi-channel active pattern including a first portion having a top surface protruding further in an upward direction than a top surface of the field insulating layer and a second portion on both sides of the first portion, the second portion having sidewalls with a continuous profile and a top surface protruding further in the upward direction than the top surface of the field insulating layer and protruding in the upward direction less than the top surface of the first portion, a gate electrode on the first portion of the first multi-channel active pattern and extending along a second direction different from the first direction, and a first source/drain region on the second portion of the first multi-channel active pattern and contacting the field insulating layer.Type: ApplicationFiled: January 20, 2015Publication date: November 5, 2015Inventors: Yeong-Jong JEONG, Jeong-Yun LEE, Geo-Myung SHIN, Dong-Suk SHIN, Si-Hyung LEE, Seo-Jin JEONG