Patents by Inventor Seokhyun Jeong

Seokhyun Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941315
    Abstract: A wearable electronic device is provided. The electronic device includes a camera, a communication circuit, a display including a transparent lens and displaying content through the lens, and a processor, wherein the processor may be configured to obtain first information about a first device indicated by a first object through the communication circuit when the first object is selected from among a plurality of objects for controlling devices displayed on an external electronic device, identify a first position for displaying the first information corresponding to the first object as an augmented reality image, based on a gaze direction of a user identified through the camera, determine a property of the augmented reality image, based on a user input, and control the display to display the augmented reality image having the property at the first position.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: March 26, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jinhong Jeong, Eunsu Jeong, Minji Cho, Seokhyun Kim, Gajin Song, Sunkey Lee, Chaigil Lim
  • Publication number: 20040254966
    Abstract: A bit manipulation circuit which can speedily carry out unit operations, such as repetitive data shifts and modulo-2 additions, and bit extraction and insertion, so as to facilitate the operation of a communication system involved with such unit operations while maintaining simple hardware complexity. The bit manipulation circuit is suitable for use in a programmable processor comprising a register bank for temporarily storing an operand data and performs data encoding operation based data shift modulo-2 addition, and bit extraction and insertion operation. In the circuit, a shift addition array receives the operand data, generates a plurality of shifted data being shifted from the operand data by one bit through the bit width of the operand data, carries out Mod-2 additions in parallel with respect to the operand data and at least some of the plurality of shifted data, and stores the addition result in the register bank.
    Type: Application
    Filed: May 12, 2004
    Publication date: December 16, 2004
    Applicant: DAEWOO EDUCATIONAL FOUNDATION
    Inventors: Myunghoon Sunwoo, Seokhyun Jeong