Abstract: Disclosed herein is a carrier for manufacturing a substrate, including: a base plate; adhesive layers formed on one side or both sides of the base plate; auxiliary adhesive layers, each of which is buried in one side of each of the adhesive layers, has a smaller area than each of the adhesive layers and has lower adhesivity than each of the adhesive layers; and metal layers, each of which is formed on one side of each of the auxiliary adhesive layers, whose edges are attached to the adhesive layers, and whose other portions excluding the edges are attached to the auxiliary adhesive layers. The carrier is advantageous in that a metal layer and an auxiliary adhesive layer are attached to each other by the adhesivity of the auxiliary adhesive layer, so that it is not required to use vacuum adsorption, with the result that a process of manufacturing a substrate can be performed more stably.

Abstract: The present invention provides a method of manufacturing a printed circuit board including the steps of: preparing a pair of raw materials, each formed by sequentially stacking a release film and a first insulating layer, and an adhesive layer, respectively; embedding the pair of raw materials, which are opposed to each other, in the adhesive layer while disposing the release films toward an inner layer; forming a second insulating layer, which has a via formed therethrough and a circuit pattern formed on an upper surface to be connected to the via, on the first insulating layer; cutting edge portions of the second and first insulating layers, the release film, and the adhesive layer; and removing the release film from the first insulating layer.

Abstract: Disclosed is a package substrate, in which the plating area of a first plating layer formed on a layer which is to be connected to a motherboard is larger than the plating area of a second plating layer formed on a layer which is to be connected to an electronic part, and the plating thickness of the second plating layer is greater than the plating thickness of the first plating layer, thus balancing the plating volumes of the plating layers formed on the layers of the package substrate, thereby minimizing warpage of the package substrate which results from the coefficients of thermal expansion being different.

Abstract: Disclosed is a package substrate, in which the plating area of a first plating layer formed on a layer which is to be connected to a motherboard is larger than the plating area of a second plating layer formed on a layer which is to be connected to an electronic part, and open portions are formed on the first plating layer, thus balancing the plating areas of the plating layers formed on the layers of the package substrate, thereby minimizing warpage of the package substrate due to differing coefficients of thermal expansion.

Abstract: Disclosed herein are a printed circuit board having metal bumps which have uniform diameter and are formed at fine pitch, and a method of manufacturing the printed circuit board.

Abstract: A package substrate is disclosed. The package substrate as a printed circuit board, in which a semiconductor chip is mounted on one side thereof and the other side thereof is mounted on a main board, can include a substrate part, a first pad, which is formed on one side of the substrate part such that the first pad is electrically connected to the semiconductor chip, and a first solder resist layer, which is formed on one surface of the substrate part such that the first pad is exposed. Here, the first solder resist layer is divided into a pad portion and a dummy portion, the first pad is exposed in the pad portion, and the dummy portion is thinner than the pad portion. The package substrate can contribute to the formation of a structure in which thermal expansion coefficients are symmetrical between the top and bottom, thus preventing the warpage.

Abstract: Disclosed herein is a printed circuit board having round solder bumps and a method of manufacturing the same. The solder bump is configured to have a round connecting surface in contact with a pad, and thus have an increased contact area with respect to the pad, thus improving connection reliability. The solder bumps have uniform heights.

Abstract: Disclosed herein is a coreless substrate having filled via pads and a method of manufacturing the same. Insulating layers are formed on both sides of a build-up layer, and via-pads are embedded in the insulating layers such that the via-pads are flush with the insulating layers. The via pads are not separated from a substrate, and thus reliability of the pads is increased. Flatness of bumps is increased, and thus bonding of flip chips becomes easy.

Abstract: Disclosed herein is a printed circuit board with embedded capacitors therein which comprises inner via holes filled with a high dielectric polymer capacitor paste composed of a composite of BaTiO3 and an epoxy resin, and a process for manufacturing the printed circuit board.

Abstract: Disclosed are a printed circuit board and a manufacturing method thereof. The printed circuit board in accordance with the present invention includes: a circuit laminate, a solder resist laminated on the circuit laminate, a metal support layer formed on the solder resist, a stiffener formed on the metal support layer.

Abstract: Disclosed herein is a printed circuit board with embedded capacitors therein which comprises inner via holes filled with a high dielectric polymer capacitor paste composed of a composite of BaTiO3 and an epoxy resin, and a process for manufacturing the printed circuit board.

Abstract: The present invention relates to a coated particle of amlodipine maleate and a pharmaceutical composition for cardiovascular disease (CVD) comprising the coated particle of amlodipine maleate. The pharmaceutical composition of the present invention has stable bioavailability due to sufficient dissolution rate and prevents decomposition reaction of amlodipine to thereby being formulated with formulation-stability equal to or higher than amlodipine besylate under long storage.

Abstract: A method of manufacturing a printed circuit board having solder balls. The method may include: stacking a second carrier, in which at least one hole is formed, over one side of a first carrier; forming at least one solder bump by filling the hole with a conductive material; forming a circuit pattern layer, which is electrically connected with the solder bump, on the second carrier; and exposing the solder bump by removing the first carrier and the second carrier. Using this method, uniform hemispherical solder balls with fine pitch can be formed as a part of the manufacturing process, without having to attach the solder balls separately. Carriers may be used to serve as supports during the manufacturing process, whereby deformations can be prevented in the board.

Abstract: A multilayered printed circuit board is disclosed. A method of manufacturing the multilayered printed circuit board, which includes: forming a metal layer and a lower-circuit-forming pattern in order on a carrier, and forming a lower circuit by filling a conductive material in the lower-circuit-forming pattern; removing the lower-circuit-forming pattern, stacking an insulation resin, and forming at least one via hole connecting with the lower circuit; forming at least one inner circuit and at least one interlayer connector connecting the inner circuit with the lower circuit on the insulation resin, to form a pair of circuit parts; and aligning the pair of circuit parts, attaching the pair of circuit parts to each other, and removing the carrier and the metal layer, allows the forming of fine-lined circuits and provides a thin board, while preventing bending and warpage in the board.

Abstract: This invention relates to tacrolimus injection comprising tacrolimus as an active ingredient, macrogol 15 hydroxystearate as a surfactant and a non-aqueous solvent.

Abstract: A printed circuit board (PCB) having at least one embedded capacitor and a method of fabricating the same is provided. A dielectric layer is formed using a ceramic material having a high capacitance, thereby assuring that the capacitors each have a high dielectric constant corresponding to the capacitance of a decoupling chip capacitor.

Abstract: Disclosed is a printed circuit board which is advantageous in terms of high capacitance by embedding capacitors comprising polymer capacitor pastes with high-dielectric constant coated on an inner layer of the printed circuit board and then semi-dried to a state of B-stage.

Abstract: Disclosed is a method of producing a printed circuit board (PCB) with an embedded resistor, in which a resistor with a desired shape and volume is precisely formed using a resistor paste so that resistance values according to a position of the PCB are uniform, thereby a laser trimming process is omitted or minimally utilized. The method has advantages in that a production time of the PCB is shortened and productivity is improved because an operation condition is rapidly set without being greatly affected by the position precision of a printing device. Other advantages of the method are that the resistor paste with a relatively uniform thickness is secured through a screen printing process, thereby easily forming the resistor and improving resistance tolerance.

Abstract: Disclosed is a PCB including embedded capacitors and a method of fabricating the same. A dielectric layer is formed using a ceramic material having a high capacitance, thereby assuring that the capacitors each have a high dielectric constant corresponding to the capacitance of a decoupling chip capacitor.

Abstract: Disclosed herein are a printed circuit board with embedded capacitors therein and a process for manufacturing the printed circuit board. The embedded capacitors are formed by applying a photosensitive insulating resin to a printed circuit board inner layer, and applying a high dielectric polymer capacitor paste thereto.