Abstract: A processor for processing stream data at a high speed is provided. The processor may include a functional unit to perform an operation on the stream data, an input interface module to perform relaying between the functional unit and an external data producer module that is used to input the stream data to the processor, and an output interface module to perform relaying between the functional unit and an external data consumer module that is used to receive an input of result data regarding a result of the operation performed by the functional unit.

Abstract: A method and apparatus for providing shared caches. A cache memory system may be operated in a first mode or a second mode. When the cache memory system is operated in the first mode, a first cache and a second cache of the cache memory system may be operated independently. When the cache memory system is operated in the second mode, the first cache and the second cache may be shared. In the second mode, at least one bit may overlap tag bits and set index bits among bits of a memory address.

Abstract: A bus arbitration apparatus and method are provided. A plurality of masters may be classified into master types based on master characteristics, and bus arbitration may be performed. Thus, it is possible to prevent a bus from being distributed to a predetermined master, and it is possible to improve overall performance of a bus system by solving a problem of unbalanced distribution of performance between the plurality of masters.

Abstract: A cache memory system and a caching method for a tile-based rendering may be provided. Each of cache lines in the cache memory system may include delayed-replacement information. The delayed-replacement information may indicate whether texture data referred to at a position of an edge of a tile is included in a cache line. When a cache line corresponding to an access-requested address is absent in the cache memory system, the cache memory system may select and remove a cache line to be removed from an associative cache unit, based on delayed-replacement information.

Abstract: An apparatus and method for tile binning are provided. The tile binning apparatus may include a determination unit to determine whether a triangle obtained as a result of geometric processing includes an abnormal edge, an overlap test unit to perform an overlap test with respect to each edge of the triangle when the abnormal edge is absent from the triangle, and to sort three vertices of the triangle according to Y-axis values and perform the overlap test with respect to each edge of the triangle based on a sorting result when the triangle includes the abnormal edge, and a bin array update unit to update a bin array based on an overlap test result.

Abstract: A method and apparatus for graphic processing using multi-threading includes at least one context task, mediation task, and control task executed by a processor. The at least one context task sequentially generates graphic commands. The mediation task mediates processing of the graphic commands. The mediation task may process a particular graphic command on behalf of the at least one context task, and change a processing order of the graphic commands. The control task transmits the graphic commands to a graphic hardware.

Abstract: A method, medium, and system efficiently rendering 3 dimensional (3D) graphics data. The rendering method includes calculating the strength of a fog effect that is to be applied to graphics data, determining whether texture mapping must be performed on the graphics data, according to the strength of the fog effect, and performing the texture mapping according to the determination result. Accordingly, it is possible to reduce the number of memory access operations for reading textures.

Abstract: Provided are a clipping apparatus and clipping method for a three-dimensional (3D) graphic rendering. The clipping apparatus may reset or convert a triangular object based on distance information of vertices configuring or comprising the triangular object where a perspective projection scheme is applied.

Abstract: Disclosed are a reconfigurable processor and processing method, a reconfiguration control apparatus and method, and a thread modeler and modeling method. A memory area of a reconfigurable processor may be divided into a plurality of areas, and a context enabling a thread process may be stored in respective divided areas, in advance. Accordingly, when a context switching is performed from one thread to another thread, the other thread may be executed by using information stored in an area corresponding to the other thread.

Abstract: A rendering apparatus and method are provided. The rendering method includes: reading a block, corresponding to a fragment, from among compressed blocks stored in a depth buffer, by considering frequency information corresponding to the fragment and prepared in advance; and performing a depth test for the fragment by considering the restored block.

Abstract: A tile-based rendering apparatus and method is provided. Vertex data sorted based on a tile unit may be stored in a scene buffer and be rendered. Among the stored vertex data, vertex data used several times for rendering may be temporarily stored in a memory or a cache. Vertex data having a probability of being read several times from the scene buffer may be temporarily stored in another memory.

Abstract: A selector of an image processing apparatus may select, from a plurality of sub-pixels included in a first pixel, at least one sub-pixel to be anti-aliased. A processor of the image processing apparatus may calculate a color value of the first pixel by performing an anti-aliasing process with respect to each of the selected at least one sub-pixel.

Abstract: Provided is a rendering method and apparatuses for rendering image data. The rendering method includes generating a primitive list by performing geometry processing on a current tile to be rendered; determining whether the current tile is identical to a previous tile from among tiles included in a previously rendered frame; and in response to the previous tile being identical to the current tile, generating an image of the current tile by re-using an image of the previous tile.

Abstract: Methods and apparatuses of converting a program, which may enhance an execution speed of a computer program, are provided. The method may include receiving a program, detecting at least one loop statement including at least one branch statement within the program, determining whether the loop statement may be split into at one or more sub-loop statements which perform the same function as a function of the loop statement and from which the branch statement has been removed, splitting the loop statement into the sub-loop statements and removing the branch statement included in the loop statement if it is determined that the loop statement may be split as a result of the determination, and outputting a result of removing the branch statement.

Abstract: A rendering method includes determining, at a geometry processor, if a previous draw command from among previous draw commands is identical to a current draw command; in response to the previous draw command being identical to the current draw command, selecting a primitive list indicating a result of geometry processing performed on the previous draw command; and performing pixel processing using the primitive list.

Abstract: Provided is an apparatus, method and computer-readable medium rendering three-dimensional (3D) graphics. The 3D graphics rendering apparatus, method and computer-readable medium may predict a screen area to be updated in a subsequent frame based on at least one of object information of a current frame, rendered data of the current frame, and object information of the subsequent frame, and may extract rendering data of the predicted screen area from one of the current frame and the subsequent frame.

Abstract: Provided is a graphics processing method and apparatus using a post fragment shader. A rendering pipeline of the graphics processing apparatus may include a fragment shader that operates before a raster operator, and a post fragment shader that operates after the raster operator. Each of the fragment shader and the post fragment shader may apply a different effect to each of a plurality of fragments.

Abstract: A camera calibration method and medium and a 3-dimensional (3D) object reconstruction method and medium using the camera calibration method are provided. The camera calibration method includes setting a feature track by tracking and matching features in an input image sequence; estimating 3-dimensional (3D) points in relation to the features by initializing a structure and motion of the camera; estimating a pose of the camera by using the 3D points and refining the structure of the camera based on the estimated pose; and refining the pose of the camera.

Abstract: A method and apparatus for controlling a fragment that controls processing of a fragment during a graphic rendering process. The method of controlling the fragment includes determining whether to process a second fragment, based on flag data representing a processing state of a first fragment, and updating the flag data based on a processing state of at least one of the first fragment and the second fragment, wherein the first fragment and the second fragment refer to fragments representing an identical spatial location among fragments included in differing primitives in a frame.

Abstract: An apparatus and method for non-blocking execution of a static scheduled processor, the apparatus including a processor to process at least one operation using transferred input data, and an input buffer used to transfer the input data to the processor, and store a result of processing the at least one operation, wherein the processor may include at least one functional unit (FU) to execute the at least one operation, and the at least one FU may process the transferred input data using at least one of a regular latency operation and an irregular latency operation.