Patents by Inventor SEOKSAN KIM

SEOKSAN KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230378204
    Abstract: An image sensor device including: a first digital pixel including a first photodetector and first memory cells to store a first digital signal corresponding to a first output from the first photodetector; and a second digital pixel including a second photodetector and second memory cells to store a second digital signal corresponding to a second output from the second photodetector, the second digital pixel is adjacent to one side of the first digital pixel, the first memory cells and the second memory cells are connected with a plurality of bit lines, the first memory cells are connected with a first word line and a third word line, the second memory cells are connected with a second word line and a fourth word line, the second word line is between the first and third word lines, and the third word line is between the second and fourth word lines.
    Type: Application
    Filed: August 1, 2023
    Publication date: November 23, 2023
    Inventors: Seoksan KIM, Minwoong SEO, Myunglae CHU, Jong-yeon LEE, Min-Jun CHOI
  • Patent number: 11756968
    Abstract: An image sensor device including: a first digital pixel including a first photodetector and first memory cells to store a first digital signal corresponding to a first output from the first photodetector; and a second digital pixel including a second photodetector and second memory cells to store a second digital signal corresponding to a second output from the second photodetector, the second digital pixel is adjacent to one side of the first digital pixel, the first memory cells and the second memory cells are connected with a plurality of bit lines, the first memory cells are connected with a first word line and a third word line, the second memory cells are connected with a second word line and a fourth word line, the second word line is between the first and third word lines, and the third word line is between the second and fourth word lines.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seoksan Kim, Minwoong Seo, Myunglae Chu, Jong-Yeon Lee, Min-Jun Choi
  • Patent number: 11729531
    Abstract: An image sensor includes a pixel including a photoelectric conversion device configured to convert sensed light into charges and a floating diffusion node configured to store charges provided from the photoelectric conversion device, a timing generator configured to generate a reset signal including, prior to a light-sensing period, a first reset signal pulse for enabling an erasing of charges stored in at least one of the photoelectric conversion device and the floating diffusion node, and generate a transfer signal including, subsequent to the light-sensing period, at least two transfer signal pulses, each transfer signal pulse enabling a moving of charges stored in the photoelectric conversion device to the floating diffusion node, and a readout circuit configured to generate output data by summing results of performing at least two samplings for the floating diffusion node based on the at least two transfer signal pulses.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seoksan Kim, Minwoong Seo
  • Publication number: 20230122582
    Abstract: An image sensor includes a pixel array in which a plurality of pixels are arranged. Each of the plurality of pixels includes an organic photodiode of which a sensitivity is adjusted based on an external voltage, a silicon photodiode, first and second floating diffusion nodes, a conversion gain transistor, and a driving transistor. Charges generated by the silicon photodiode are accumulated in the first floating diffusion node. Charges generated by the organic photodiode are accumulated in the second floating diffusion node. One end of the conversion gain transistor is connected to the first floating diffusion node and the other end connected is connected to the second floating diffusion node. The driving transistor is configured to generate a pixel signal corresponding to a voltage of the first floating diffusion node.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 20, 2023
    Inventors: Minjun CHOI, Myunglae Chu, Seoksan Kim, Minwoong Seo, Jiyoun Song, Hyunyong Jung
  • Publication number: 20220394197
    Abstract: An image sensor includes a pixel having an internal capacitor. Each of a plurality of pixels of the image sensor includes a photodetection circuit and an analog-to-digital converter (ADC). The photodetection circuit generates a detection signal. The ADC converts the detection signal using a ramp signal. The photodetection circuit includes a photodiode, a floating diffusion node and an overflow transistor. The floating diffusion node accumulates photocharges generated by the photodiode and includes a parasitic capacitor. The overflow transistor electrically connects the floating diffusion node to a first internal capacitor of the ADC.
    Type: Application
    Filed: May 13, 2022
    Publication date: December 8, 2022
    Inventors: Hyunyong JUNG, Seoksan KIM, Minwoong SEO, Myunglae CHU
  • Patent number: 11303835
    Abstract: Provided are a pixel array and an image sensor. The pixel array includes a plurality of pixels, which are arranged in a matrix form and which convert an optical signal into an electrical signal. The pixel array includes a first pixel arranged in a first row of the pixel array and a second pixel arranged in a second row of the pixel array, wherein each of the first pixel and the second pixel includes a first memory storing a digital reset value according to internal noise, the first memory of the first pixel stores m-bit data (where m is a natural number equal to or greater than 2), and the first memory of the second pixel stores n-bit data (where n is a natural number less than m).
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: April 12, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myunglae Chu, Sungyong Kim, Seoksan Kim, Minwoong Seo, Jaekyu Lee, Jongyeon Lee, Junan Lee
  • Publication number: 20220086380
    Abstract: An image sensor includes a pixel including a photoelectric conversion device configured to convert sensed light into charges and a floating diffusion node configured to store charges provided from the photoelectric conversion device, a timing generator configured to generate a reset signal including, prior to a light-sensing period, a first reset signal pulse for enabling an erasing of charges stored in at least one of the photoelectric conversion device and the floating diffusion node, and generate a transfer signal including, subsequent to the light-sensing period, at least two transfer signal pulses, each transfer signal pulse enabling a moving of charges stored in the photoelectric conversion device to the floating diffusion node, and a readout circuit configured to generate output data by summing results of performing at least two samplings for the floating diffusion node based on the at least two transfer signal pulses.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 17, 2022
    Inventors: Seoksan Kim, Minwoong Seo
  • Patent number: 11222918
    Abstract: An image sensor comprising a substrate including an upper surface and a lower surface opposite each other and extending in a first direction and a second direction, a first isolation region in the substrate and apart from the upper surface in a third direction perpendicular to the first direction and second direction, the first isolation region defining a boundary of a photoelectric conversion region, a second isolation region in the substrate and extending in the third direction from the lower surface to the first isolation region, a plurality of transistors on the upper surface in the photoelectric conversion region, and a photoelectric conversion device in the substrate in the photoelectric conversion region. The first isolation region includes a potential well doped with an impurity of a first conductivity type, and the second isolation region includes an insulating material layer.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: January 11, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungchul Kim, Jaeho Kim, Uihui Kwon, Seoksan Kim, Minwoong Seo
  • Publication number: 20210152772
    Abstract: Provided are a pixel array and an image sensor. The pixel array includes a plurality of pixels, which are arranged in a matrix form and which convert an optical signal into an electrical signal. The pixel array includes a first pixel arranged in a first row of the pixel array and a second pixel arranged in a second row of the pixel array, wherein each of the first pixel and the second pixel includes a first memory storing a digital reset value according to internal noise, the first memory of the first pixel stores m-bit data (where m is a natural number equal to or greater than 2), and the first memory of the second pixel stores n-bit data (where n is a natural number less than m).
    Type: Application
    Filed: August 18, 2020
    Publication date: May 20, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Myunglae CHU, Sungyong KIM, Seoksan KIM, Minwoong SEO, Jaekyu LEE, Jongyeon LEE, Junan LEE
  • Publication number: 20210091129
    Abstract: An image sensor device including: a first digital pixel including a first photodetector and first memory cells to store a first digital signal corresponding to a first output from the first photodetector; and a second digital pixel including a second photodetector and second memory cells to store a second digital signal corresponding to a second output from the second photodetector, the second digital pixel is adjacent to one side of the first digital pixel, the first memory cells and the second memory cells are connected with a plurality of bit lines, the first memory cells are connected with a first word line and a third word line, the second memory cells are connected with a second word line and a fourth word line, the second word line is between the first and third word lines, and the third word line is between the second and fourth word lines.
    Type: Application
    Filed: May 25, 2020
    Publication date: March 25, 2021
    Inventors: SEOKSAN KIM, MINWOONG SEO, Myunglae CHU, Jong-yeon LEE, MIN-JUN CHOI