Abstract: An integrated circuit structure in which a plurality of Schottky diodes and a capacitor are integrally formed. The integrated circuit structure includes a substrate including an N-type semiconductor doped with N-type impurities and a P-type semiconductor doped with P-type impurities; a first conductive layer laminated on the substrate so that the first conductive layer is electrically connected to the N-type semiconductor and the P-type semiconductor; a dielectric layer laminated on an upper surface of the first conductive layer; and a second conductive layer laminated on an upper surface of the dielectric layer so that the second conductive layer forms a capacitor together with the first conductive layer and the dielectric layer. Accordingly, when the integrated circuit structure is used in a rectification circuit, the size of an entire circuit can be reduced.

Abstract: An RFID tag capable of enhancing the reliability of products and an RFID system having the same are provided. The RFID tag includes a tag antenna receiving waves from an RFID reader, and a tag driver. The tag driver includes an accumulation mode capacitor adjusting a capacitance value corresponding to an input voltage. That is, the tag driver adjusts the amplitude of a modulated carrier wave using the accumulation mode capacitor. Accordingly, the RFID tag adjusts the impedance of the tag driver without adjusting the current transmitted from the tag driver. Therefore, impedance adjustment of the tag driver can prevent the voltage transmitted from the tag driver from being lower than the reference voltage, and modulation and demodulation can be stably performed. As a result, the reliability of products can be enhanced.

Abstract: An integrated circuit structure in which a plurality of Schottky diodes and a capacitor are integrally formed. The integrated circuit structure includes a substrate including an N-type semiconductor doped with N-type impurities and a P-type semiconductor doped with P-type impurities; a first conductive layer laminated on the substrate so that the first conductive layer is electrically connected to the N-type semiconductor and the P-type semiconductor; a dielectric layer laminated on an upper surface of the first conductive layer; and a second conductive layer laminated on an upper surface of the dielectric layer so that the second conductive layer forms a capacitor together with the first conductive layer and the dielectric layer. Accordingly, when the integrated circuit structure is used in a rectification circuit, the size of an entire circuit can be reduced.

Abstract: An integrated circuit structure in which a plurality of Schottky diodes and a capacitor are integrally formed. The integrated circuit structure includes a substrate including an N-type semiconductor doped with N-type impurities and a P-type semiconductor doped with P-type impurities; a first conductive layer laminated on the substrate so that the first conductive layer is electrically connected to the N-type semiconductor and the P-type semiconductor; a dielectric layer laminated on an upper surface of the first conductive layer; and a second conductive layer laminated on an upper surface of the dielectric layer so that the second conductive layer forms a capacitor together with the first conductive layer and the dielectric layer. Accordingly, when the integrated circuit structure is used in a rectification circuit, the size of an entire circuit can be reduced.

Abstract: An RFID tag capable of enhancing the reliability of products and an RFID system having the same are provided. The RFID tag includes a tag antenna receiving waves from an RFID reader, and a tag driver. The tag driver includes an accumulation mode capacitor adjusting a capacitance value corresponding to an input voltage. That is, the tag driver adjusts the amplitude of a modulated carrier wave using the accumulation mode capacitor. Accordingly, the RFID tag adjusts the impedance of the tag driver without adjusting the current transmitted from the tag driver. Therefore, impedance adjustment of the tag driver can prevent the voltage transmitted from the tag driver from being lower than the reference voltage, and modulation and demodulation can be stably performed. As a result, the reliability of products can be enhanced.

Abstract: An integrated circuit structure in which a plurality of Schottky diodes and a capacitor are integrally formed. The integrated circuit structure includes a substrate including an N-type semiconductor doped with N-type impurities and a P-type semiconductor doped with P-type impurities; a first conductive layer laminated on the substrate so that the first conductive layer is electrically connected to the N-type semiconductor and the P-type semiconductor; a dielectric layer laminated on an upper surface of the first conductive layer; and a second conductive layer laminated on an upper surface of the dielectric layer so that the second conductive layer forms a capacitor together with the first conductive layer and the dielectric layer. Accordingly, when the integrated circuit structure is used in a rectification circuit, the size of an entire circuit can be reduced.

Abstract: Disclosed is a fabrication of a bipolar transistor using an enhanced trench isolation so as to improve integration and performance thereof, comprising the steps of sequentially etching back portions corresponding to a trench using a trench forming mask to a predetermined depth of the buried collector to form the trench; filling an isolation insulating layer into the trench; polishing the isolation insulating layer up to a surface of the silicon oxide layer; sequentially forming a second insulating layer on the isolating insulating layer and the silicon oxide layer; removing the first polysilicon layer and the first insulating layer formed on an inactive region other than an active region defined by the trench; thermal-oxidizing the collector layer formed on the inactive region to form a thermal oxide layer; removing the second insulating layer and sequentially forming a third polysilicon, a third insulating layer and a second nitride layer; etching back layers formed on a portion of the first insulating layer

Abstract: Disclosed is a fabrication of a bipolar transistor with a super self-aligned vertical structure in which emitter, base and collector are vertically self-aligned, the fabrication method comprising the steps of forming a conductive buried collector region in a silicon substrate by using ion-implantation of an impurity and thermal-annealing; sequentially forming several layers; selectively removing the nitride and polysilicon layers to form a pattern; sequentially forming a silicon oxide layer, a third layer and a silicon oxide layer thereon; forming a patterned photoresist layer thereon to define active and inactive regions and removing several layers on the active region to form an opening; forming a side wall on both sides of the opening; forming a collector on a surface portion of the buried collector region up to a lower surface of the polysilicon layer; removing the side wall and the third nitride layer to expose a side surface of the second polysilicon layer; selectively forming a base on an upper surface

Abstract: Disclosed is a method of fabricating an SOI substrate, comprising the steps of forming a first insulating layer on a single crystal silicon substrate; patterning the first insulating layer to form an opening; growing a single crystal silicon in the opening to form active and inactive regions; polishing the active region 31 as the first insulating layer as a polishing stopper to form a planarized surface; depositing a second insulating layer on the planarized surface; bonding a bonding substrate to the second insulating layer; and polishing the silicon substrate using the first insulating layer as a stopper up to a surface of the active region. By the method, a stray capacitance occurring between an SOI substrate and a metal wiring portion formed thereon can be significantly reduced owing to a relatively thick insulating layer therebetween, and a parasitic capacitance can be eliminated owing to an insulating layer interposed between a bonding substrate and an active region to be used as a buried collector.