Patents by Inventor Seong-Woo Ahn
Seong-Woo Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240098880Abstract: The present disclosure relates to an electronic device, and more specifically, to an electronic device including a printed circuit board including a heat-generating element arranged on one surface thereof, and a heat transfer coin provided such that one surface of the heat transfer coin comes into contact with a portion of the other surface of the printed circuit board, opposite to the heat-generating element, so as to dissipate heat generated from the heat-generating element. Accordingly, the present disclosure provides an advantage of improving heat dissipation performance without increasing the thickness of the printed circuit board.Type: ApplicationFiled: December 1, 2023Publication date: March 21, 2024Applicant: KMW INC.Inventors: Bae Mook JEONG, Kyo Sung JI, Seong Min AHN, Chi Back RYU, Jae Eun KIM, Seung Min LEE, Ki Hun PARK, Won Jun PARK, Jun Woo YANG
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Publication number: 20240088553Abstract: The present invention relates to a signal shielding apparatus and an antenna apparatus including same, and in particular, comprises a shield cover which is stacked and disposed on a printed board assembly (hereinafter, abbreviated to “PBA”), in which a plurality of signal-related components are mounted on one side thereof to prevent leakage of a signal from the plurality of signal-related components, wherein a grooved shield cover seating groove is formed in one surface of the PBA, and an insertion end insertably seated in the shield cover seating groove is integrally formed in the other surface from among one surface and the other surface of the shield cover, the other surface facing the one surface of the PBA, thereby providing advantages in that an increase in the manufacturing cost may be prevented, EMI shielding may be facilitated, and heat dissipation performance may be significantly improved.Type: ApplicationFiled: November 24, 2023Publication date: March 14, 2024Applicant: KMW INC.Inventors: Duk Yong KIM, Bae Mook JEONG, Kyo Sung JI, Chi Back RYU, Won Jun PARK, Jun Woo YANG, Seong Min AHN, Ki Hun PARK, Jae Eun KIM
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Publication number: 20230236832Abstract: A semiconductor device including a first processor having a first register, the first processor configured to perform region of interest (ROI) calculations using the first register; and a second processor having a second register, the second processor configured to perform arithmetic calculations using the second register. The first register is shared with the second processor, and the second register is shared with the first processor.Type: ApplicationFiled: March 31, 2023Publication date: July 27, 2023Inventors: Hyun Pil KIM, Hyun Woo SIM, Seong Woo AHN
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Patent number: 11645072Abstract: A semiconductor device including a first processor having a first register, the first processor configured to perform region of interest (ROI) calculations using the first register; and a second processor having a second register, the second processor configured to perform arithmetic calculations using the second register. The first register is shared with the second processor, and the second register is shared with the first processor.Type: GrantFiled: March 29, 2021Date of Patent: May 9, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Pil Kim, Hyun Woo Sim, Seong Woo Ahn
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Patent number: 11442728Abstract: A sequence alignment method that may be performed by a vector processor is may include loading a sequence that is an instance of vector data including a plurality of elements, dividing the sequence into two groups, aligning respective elements of the groups to generate a sequence of sorted elements according to a single instruction multiple data mode, and iteratively performing an alignment operation based on a determination that each group in the sequence of sorted elements includes more than one element of the plurality of elements. Each iteration may include dividing each group to form new groups and aligning respective elements of each pair of adjacent new groups to generate a new sequence of sorted elements. The new sequence of a current iteration of the alignment operation may be transmitted as a data output, based on a determination that each new group does not include more than one element.Type: GrantFiled: June 20, 2019Date of Patent: September 13, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Pil Kim, Hyun Woo Sim, Seong Woo Ahn
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Patent number: 11429838Abstract: Provided are a neural network device for performing a neural network operation, a method of operating the neural network device, and an application processor including the neural network device. The neural network device includes a direct memory access (DMA) controller configured to receive floating-point data from a memory; a data converter configured to convert the floating-point data received through the DMA controller to integer-type data; and a processor configured to perform a neural network operation based on an integer operation by using the integer-type data provided from the data converter.Type: GrantFiled: August 21, 2019Date of Patent: August 30, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-Pil Kim, Seong-Woo Ahn, Jong-Hyup Lee
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Patent number: 11237405Abstract: The camera module includes: a first frame that is formed to surround a lens and fixes the lens; a second frame that is formed to surround the first frame and is apart from the first frame; a third frame that is formed to surround the second frame and is apart from the second frame; a plurality of first piezoelectric actuators that connect the first frame to the second frame; and a plurality of second piezoelectric actuators that connect the second frame to the third frame, wherein the plurality of first piezoelectric actuators are arranged in parallel in a first direction around the lens, and the plurality of second piezoelectric actuators are arranged in parallel in a second direction around the lens.Type: GrantFiled: April 5, 2019Date of Patent: February 1, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-min Suh, Seong-woo Ahn
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Patent number: 11096121Abstract: An apparatus and a method for controlling power consumption of a terminal in a wireless communication system are provided. The method includes deactivating one or more of hardware components for signal reception in a transmission interval if there is no data to be received in the transmission interval, and receiving a control signal by activating all the components in a next transmission interval.Type: GrantFiled: November 26, 2018Date of Patent: August 17, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Tae-Yoon Kim, Min-Goo Kim, Seong-Woo Ahn, Jong-Han Lim, Chae-Man Lim, Young-Seok Jung
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Patent number: 11068265Abstract: A sequence alignment method that may be performed by a vector processor is may include loading a sequence that is an instance of vector data including a plurality of elements, dividing the sequence into two groups, aligning respective elements of the groups to generate a sequence of sorted elements according to a single instruction multiple data mode, and iteratively performing an alignment operation based on a determination that each group in the sequence of sorted elements includes more than one element of the plurality of elements. Each iteration may include dividing each group to form new groups and aligning respective elements of each pair of adjacent new groups to generate a new sequence of sorted elements. The new sequence of a current iteration of the alignment operation may be transmitted as a data output, based on a determination that each new group does not include more than one element.Type: GrantFiled: June 20, 2019Date of Patent: July 20, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Pil Kim, Hyun Woo Sim, Seong Woo Ahn
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Publication number: 20210216312Abstract: A semiconductor device including a first processor having a first register, the first processor configured to perform region of interest (ROI) calculations using the first register; and a second processor having a second register, the second processor configured to perform arithmetic calculations using the second register. The first register is shared with the second processor, and the second register is shared with the first processor.Type: ApplicationFiled: March 29, 2021Publication date: July 15, 2021Inventors: Hyun Pil KIM, Hyun Woo SIM, Seong Woo AHN
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Patent number: 10990388Abstract: A semiconductor device including a first processor having a first register, the first processor configured to perform region of interest (ROI) calculations using the first register; and a second processor having a second register, the second processor configured to perform arithmetic calculations using the second register. The first register is shared with the second processor, and the second register is shared with the first processor.Type: GrantFiled: July 24, 2019Date of Patent: April 27, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Pil Kim, Hyun Woo Sim, Seong Woo Ahn
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Publication number: 20200167632Abstract: Provided are a neural network device for performing a neural network operation, a method of operating the neural network device, and an application processor including the neural network device. The neural network device includes a direct memory access (DMA) controller configured to receive floating-point data from a memory; a data converter configured to convert the floating-point data received through the DMA controller to integer-type data; and a processor configured to perform a neural network operation based on an integer operation by using the integer-type data provided from the data converter.Type: ApplicationFiled: August 21, 2019Publication date: May 28, 2020Inventors: HYUN-PIL KIM, SEONG-WOO AHN, JONG-HYUP LEE
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Patent number: 10649771Abstract: A semiconductor device including a first processor having a first register, the first processor configured to perform region of interest (ROI) calculations using the first register; and a second processor having a second register, the second processor configured to perform arithmetic calculations using the second register. The first register is shared with the second processor, and the second register is shared with the first processor.Type: GrantFiled: September 28, 2017Date of Patent: May 12, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Pil Kim, Hyun Woo Sim, Seong Woo Ahn
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Publication number: 20190346740Abstract: The camera module includes: a first frame that is formed to surround a lens and fixes the lens; a second frame that is formed to surround the first frame and is apart from the first frame; a third frame that is formed to surround the second frame and is apart from the second frame; a plurality of first piezoelectric actuators that connect the first frame to the second frame; and a plurality of second piezoelectric actuators that connect the second frame to the third frame, wherein the plurality of first piezoelectric actuators are arranged in parallel in a first direction around the lens, and the plurality of second piezoelectric actuators are arranged in parallel in a second direction around the lens.Type: ApplicationFiled: April 5, 2019Publication date: November 14, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Sang-min Suh, Seong-woo Ahn
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Publication number: 20190347096Abstract: A semiconductor device including a first processor having a first register, the first processor configured to perform region of interest (ROI) calculations using the first register; and a second processor having a second register, the second processor configured to perform arithmetic calculations using the second register. The first register is shared with the second processor, and the second register is shared with the first processor.Type: ApplicationFiled: July 24, 2019Publication date: November 14, 2019Inventors: Hyun Pil KIM, Hyun Woo SIM, Seong Woo AHN
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Publication number: 20190303148Abstract: A sequence alignment method that may be performed by a vector processor is may include loading a sequence that is an instance of vector data including a plurality of elements, dividing the sequence into two groups, aligning respective elements of the groups to generate a sequence of sorted elements according to a single instruction multiple data mode, and iteratively performing an alignment operation based on a determination that each group in the sequence of sorted elements includes more than one element of the plurality of elements. Each iteration may include dividing each group to form new groups and aligning respective elements of each pair of adjacent new groups to generate a new sequence of sorted elements. The new sequence of a current iteration of the alignment operation may be transmitted as a data output, based on a determination that each new group does not include more than one element.Type: ApplicationFiled: June 20, 2019Publication date: October 3, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Hyun Pil Kim, Hyun Woo Sim, Seong Woo Ahn
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Publication number: 20190303149Abstract: A sequence alignment method that may be performed by a vector processor is may include loading a sequence that is an instance of vector data including a plurality of elements, dividing the sequence into two groups, aligning respective elements of the groups to generate a sequence of sorted elements according to a single instruction multiple data mode, and iteratively performing an alignment operation based on a determination that each group in the sequence of sorted elements includes more than one element of the plurality of elements. Each iteration may include dividing each group to form new groups and aligning respective elements of each pair of adjacent new groups to generate a new sequence of sorted elements. The new sequence of a current iteration of the alignment operation may be transmitted as a data output, based on a determination that each new group does not include more than one element.Type: ApplicationFiled: June 20, 2019Publication date: October 3, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Hyun Pil KIM, Hyun Woo SIM, Seong Woo AHN
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Patent number: 10409593Abstract: A semiconductor device including a first processor having a first register, the first processor configured to perform region of interest (ROI) calculations using the first register; and a second processor having a second register, the second processor configured to perform arithmetic calculations using the second register. The first register is shared with the second processor, and the second register is shared with the first processor.Type: GrantFiled: February 27, 2018Date of Patent: September 10, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Pil Kim, Hyun Woo Sim, Seong Woo Ahn
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Patent number: 10372451Abstract: A sequence alignment method that may be performed by a vector processor is may include loading a sequence that is an instance of vector data including a plurality of elements, dividing the sequence into two groups, aligning respective elements of the groups to generate a sequence of sorted elements according to a single instruction multiple data mode, and iteratively performing an alignment operation based on a determination that each group in the sequence of sorted elements includes more than one element of the plurality of elements. Each iteration may include dividing each group to form new groups and aligning respective elements of each pair of adjacent new groups to generate a new sequence of sorted elements. The new sequence of a current iteration of the alignment operation may be transmitted as a data output, based on a determination that each new group does not include more than one element.Type: GrantFiled: November 3, 2017Date of Patent: August 6, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun Pil Kim, Hyun Woo Sim, Seong Woo Ahn
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Publication number: 20190098575Abstract: An apparatus and a method for controlling power consumption of a terminal in a wireless communication system are provided. The method includes deactivating one or more of hardware components for signal reception in a transmission interval if there is no data to be received in the transmission interval, and receiving a control signal by activating all the components in a next transmission interval.Type: ApplicationFiled: November 26, 2018Publication date: March 28, 2019Inventors: Tae-Yoon Kim, Min-Goo Kim, Seong-Woo Ahn, Jong-Han Lim, Chae-Man Lim, Young-Seok Jung