Abstract: A semiconductor device includes a substrate, a bottom electrode on the substrate, a first support layer on the substrate next to a sidewall of the bottom electrode, a dielectric layer covering the sidewall and a top surface of the bottom electrode, and a top electrode on the dielectric layer. The bottom electrode includes a first part having a plurality of protrusions that protrude from a sidewall of the first part. The first part of the bottom electrode may be on the first support layer.

Abstract: A semiconductor device includes a substrate, a bottom electrode on the substrate, a first support layer on the substrate next to a sidewall of the bottom electrode, a dielectric layer covering the sidewall and a top surface of the bottom electrode, and a top electrode on the dielectric layer. The bottom electrode includes a first part having a plurality of protrusions that protrude from a sidewall of the first part. The first part of the bottom electrode may be on the first support layer.

Abstract: A semiconductor device includes a substrate, a bottom electrode on the substrate, a first support layer on the substrate next to a sidewall of the bottom electrode, a dielectric layer covering the sidewall and a top surface of the bottom electrode, and a top electrode on the dielectric layer. The bottom electrode includes a first part having a plurality of protrusions that protrude from a sidewall of the first part. The first part of the bottom electrode may be on the first support layer.

Abstract: An integrated circuit (IC) device includes a lower electrode formed on a substrate, and an upper support structure disposed around the lower electrode and supporting the lower electrode. The upper support structure includes an upper support pattern surrounding the lower electrode and extending in a lateral direction parallel to the substrate, the upper support pattern having a hole through which the lower electrode passes, and an upper spacer support pattern between the upper support pattern and the lower electrode inside the hole and having an outer sidewall in contact with the upper support pattern and an inner sidewall in contact with the lower electrode, wherein a width of the upper spacer support pattern in the lateral direction decreases in a direction toward the substrate. To manufacture an IC device, an upper support pattern is formed on a substrate. An upper spacer support film is formed to cover a sidewall and a top surface of the upper support pattern.

Abstract: A semiconductor memory device includes lower electrodes, each of the lower electrodes surrounding an inner space, an upper support layer on top surfaces of the lower electrodes, the upper support layer being on the inner spaces surrounded by the lower electrodes, and an upper electrode on the upper support layer, the upper electrode filling first and second regions, the second region penetrating the upper support layer, and the first region extending from the second region into between the lower electrodes. Each of the lower electrodes includes a first portion overlapping with the first region, a top surface of the first portion being exposed by the upper support layer, and a second portion covered by the upper support layer, a top surface of the second portion being in contact with the upper support layer.

Abstract: An integrated circuit (IC) device includes a lower electrode formed on a substrate, and an upper support structure disposed around the lower electrode and supporting the lower electrode. The upper support structure includes an upper support pattern surrounding the lower electrode and extending in a lateral direction parallel to the substrate, the upper support pattern having a hole through which the lower electrode passes, and an upper spacer support pattern between the upper support pattern and the lower electrode inside the hole and having an outer sidewall in contact with the upper support pattern and an inner sidewall in contact with the lower electrode, wherein a width of the upper spacer support pattern in the lateral direction decreases in a direction toward the substrate. To manufacture an IC device, an upper support pattern is formed on a substrate. An upper spacer support film is formed to cover a sidewall and a top surface of the upper support pattern.

Abstract: A semiconductor memory device includes lower electrodes, each of the lower electrodes surrounding an inner space, an upper support layer on top surfaces of the lower electrodes, the upper support layer being on the inner spaces surrounded by the lower electrodes, and an upper electrode on the upper support layer, the upper electrode filling first and second regions, the second region penetrating the upper support layer, and the first region extending from the second region into between the lower electrodes. Each of the lower electrodes includes a first portion overlapping with the first region, a top surface of the first portion being exposed by the upper support layer, and a second portion covered by the upper support layer, a top surface of the second portion being in contact with the upper support layer.

Abstract: A semiconductor device includes a substrate, a bottom electrode on the substrate, a first support layer on the substrate next to a sidewall of the bottom electrode, a dielectric layer covering the sidewall and a top surface of the bottom electrode, and a top electrode on the dielectric layer. The bottom electrode includes a first part having a plurality of protrusions that protrude from a sidewall of the first part. The first part of the bottom electrode may be on the first support layer.

Abstract: A semiconductor memory device includes lower electrodes, each of the lower electrodes surrounding an inner space, an upper support layer on top surfaces of the lower electrodes, the upper support layer being on the inner spaces surrounded by the lower electrodes, and an upper electrode on the upper support layer, the upper electrode filling first and second regions, the second region penetrating the upper support layer, and the first region extending from the second region into between the lower electrodes. Each of the lower electrodes includes a first portion overlapping with the first region, a top surface of the first portion being exposed by the upper support layer, and a second portion covered by the upper support layer, a top surface of the second portion being in contact with the upper support layer.