Patents by Inventor Seongmoo Cho
Seongmoo Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11756867Abstract: A power module is disclosed. A power module according to an embodiment of the present disclosure may include a first substrate and a second substrate spaced apart from each other, an electronic device unit provided on at least either one of the first and second substrates, and a lead frame unit provided between the first and second substrates. One side of the lead frame unit may be connected to an external circuit, and the other side thereof may be configured to electrically connect the first and second substrates. Accordingly, the lead frame unit may perform a function of electrically connecting the first and second substrates instead of a via spacer in the related art.Type: GrantFiled: September 30, 2020Date of Patent: September 12, 2023Assignee: LG ELECTRONICS INC.Inventors: Siho Choi, Seongmoo Cho, Oksun Yu, Kwangsoo Kim, Gun Lee
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Patent number: 11735557Abstract: A power module according implementations of the present disclosure includes a bonding layer for bonding two adjacent members. The bonding layer is formed by melting, applying, and solidifying a bonding material that has excellent thermal conductivity and electrical conductivity. The melted bonding material includes a plurality of anti-tilting members. The two members bonded during the process of solidifying the melted bonding material are supported by the plurality of anti-tilting members. This may allow tilting caused during the formation of the bonding layer to be suppressed.Type: GrantFiled: March 19, 2021Date of Patent: August 22, 2023Assignee: LG MAGNA E-POWERTRAIN CO., LTD.Inventors: Siho Choi, Seongmoo Cho, Kwangsoo Kim, Gun Lee
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Patent number: 11258355Abstract: A device for power factor correction can include a converter housing having an inner surface; a first converter substrate mounted on the inner surface of the converter housing; a second converter substrate mounted on another surface of first converter housing opposite to the inner surface; and a housing cover covering the first converter substrate and coupled to an upper surface of the converter housing, in which the second converter substrate includes a first surface having a first region including a source pad, and a second region including a drain pad spaced apart from the source pad, the source pad including a source pad extension portion extending into the second region; and a second surface including a heat dissipation pad for communicating heat from the source and drain pads to an outside of the device, in which the first region of the second converter substrate overlaps with the another surface of first converter housing, and the second region of the second converter substrate faces the housing coverType: GrantFiled: April 30, 2019Date of Patent: February 22, 2022Assignee: LG ELECTRONICS INC.Inventors: Seongmoo Cho, Kwangsoo Kim
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Publication number: 20210337703Abstract: The present disclosure relates to a power module assembly, and may include a plurality of cooling fins on an upper cover covering an upper portion of a module housing and a lower cover covering a lower portion of the module housing to cool the power module received inside the module housing, and the plurality of cooling fins may constitute a cooling passage to allow coolant to flows into the module housing, and expand a heat exchange area of the power module, thereby improving the cooling performance of the power module.Type: ApplicationFiled: September 30, 2020Publication date: October 28, 2021Inventors: Gun LEE, Seongmoo CHO, Kwangsoo KIM, Siho CHOI
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Publication number: 20210329815Abstract: The present disclosure relates to an electric power module and an inverter apparatus having the same. The electric power module of the present disclosure may include a power device that converts the frequency of input power for output; a housing in which a passage of cooling fluid is disposed to accommodate the power device therein, and a cooling member, one side of which is in direct heat exchange with the power device, and the other side of which is in direct heat exchange with the cooling fluid, wherein the cooling member is made of a metal foam having a multi-porous structure. As a result, it may be possible to increase a heat transfer area of the heat conductor, and suppress the occurrence of pressure loss in the cooling fluid.Type: ApplicationFiled: September 25, 2020Publication date: October 21, 2021Inventors: Kwangsoo KIM, Seongmoo CHO, Oksun YU, Hyunsi HWANG, Siho CHOI, Gun LEE
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Publication number: 20210305193Abstract: A power module according implementations of the present disclosure includes a bonding layer for bonding two adjacent members. The bonding layer is formed by melting, applying, and solidifying a bonding material that has excellent thermal conductivity and electrical conductivity. The melted bonding material includes a plurality of anti-tilting members. The two members bonded during the process of solidifying the melted bonding material are supported by the plurality of anti-tilting members. This may allow tilting caused during the formation of the bonding layer to be suppressed.Type: ApplicationFiled: March 19, 2021Publication date: September 30, 2021Inventors: Siho CHOI, Seongmoo CHO, Kwangsoo KIM, Gun LEE
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Publication number: 20210257280Abstract: A power module is disclosed. A power module according to an embodiment of the present disclosure may include a first substrate and a second substrate spaced apart from each other, an electronic device unit provided on at least either one of the first and second substrates, and a lead frame unit provided between the first and second substrates. One side of the lead frame unit may be connected to an external circuit, and the other side thereof may be configured to electrically connect the first and second substrates. Accordingly, the lead frame unit may perform a function of electrically connecting the first and second substrates instead of a via spacer in the related art.Type: ApplicationFiled: September 30, 2020Publication date: August 19, 2021Inventors: Siho CHOI, Seongmoo Cho, Oksun Yu, Kwangsoo Kim, Gun Lee
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Publication number: 20210243923Abstract: A power module assembly is disclosed. A power module assembly according to an embodiment includes a module housing part having a power module, and an upper cover part and a lower cover part disposed to cover upper and lower sides of the module housing part, respectively, and defining a flow path part, through which cooling water flows, in spaces apart from the module housing part. The module housing part exposes a part of the power module on the flow path part. With the configuration, the cooling water can flow in direct contact with the power module, thereby more improving heat dissipation performance of the power module assembly.Type: ApplicationFiled: September 28, 2020Publication date: August 5, 2021Inventors: Hyunsi HWANG, Seongmoo CHO, Kwangsoo KIM, Siho CHOI, Gun LEE
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Publication number: 20210210411Abstract: The present disclosure provides a power module including a substrate, an electronic element provided on the substrate, and a cooling fin portion provided on one surface of the substrate to form a flow path portion through which cooling water flows. The cooling fin portion is formed asymmetrically so that amounts of heat transferred by the cooling water acting on the electronic element are different. As a result, regions in which heat is directly transferred between cooling water and the electronic element can be increased and a pressure drop of cooling water flowing through the flow path portion can be prevented by the cooling fin portion forming an asymmetrical structure of the flow path portion. In addition, a heat dissipation performance of the power module by the cooling water can be further improved.Type: ApplicationFiled: September 28, 2020Publication date: July 8, 2021Inventors: Seongmoo Cho, Kwangsoo Kim, Siho Choi, Gun Lee
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Publication number: 20200036283Abstract: A device for power factor correction can include a converter housing having an inner surface; a first converter substrate mounted on the inner surface of the converter housing; a second converter substrate mounted on another surface of first converter housing opposite to the inner surface; and a housing cover covering the first converter substrate and coupled to an upper surface of the converter housing, in which the second converter substrate includes a first surface having a first region including a source pad, and a second region including a drain pad spaced apart from the source pad, the source pad including a source pad extension portion extending into the second region; and a second surface including a heat dissipation pad for communicating heat from the source and drain pads to an outside of the device, in which the first region of the second converter substrate overlaps with the another surface of first converter housing, and the second region of the second converter substrate faces the housing coverType: ApplicationFiled: April 30, 2019Publication date: January 30, 2020Applicant: LG ELECTRONICS INC.Inventors: Seongmoo CHO, Kwangsoo KIM
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Patent number: 9276103Abstract: This specification is directed to a semiconductor device capable of reducing a leakage current by forming a first GaN layer including a plurality of GaN layers and FexNy layers interposed between the plurality of GaN layers, in a semiconductor device having the first GaN layer, an AlGaN layer, a second GaN layer, a gate electrode, a source electrode and a drain electrode which are deposited in a sequential manner, and a fabricating method thereof. To this end, a semiconductor device according to one exemplary embodiment includes a first GaN layer, an AlGaN layer on the first GaN layer, a second GaN layer on the AlGaN layer, and a source electrode, a drain electrode and a gate electrode formed on a portion of the second GaN layer, wherein the first GaN layer comprises a plurality of GaN layers and FexNy layers interposed between the plurality of GaN layers.Type: GrantFiled: July 22, 2013Date of Patent: March 1, 2016Assignee: LG Electronics Inc.Inventors: Seongmoo Cho, Taehoon Jang
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Patent number: 9252220Abstract: A nitride semiconductor power device includes an AlGaN multilayer, which has changeable Al composition along a depositing direction, and SixNy layer, so as to minimize an increase in a leakage current and a decrease in a breakdown voltage, which are caused while fabricating a heterojunction type HFET device. A semiconductor device includes a buffer layer, an AlGaN multilayer formed on the buffer layer, a GaN channel layer formed on the AlGaN multilayer, and an AlGaN barrier layer formed on the AlGaN multilayer, wherein aluminum (Al) composition of the AlGaN multilayer changes along a direction that the AlGaN multilayer is deposited.Type: GrantFiled: January 5, 2015Date of Patent: February 2, 2016Assignee: LG Electronics Inc.Inventors: Junho Kim, Seongmoo Cho, Taehoon Jang, Eujin Hwang, Jaemoo Kim
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Publication number: 20150200257Abstract: A nitride semiconductor power device includes an AlGaN multilayer, which has changeable Al composition along a depositing direction, and SixNy layer, so as to minimize an increase in a leakage current and a decrease in a breakdown voltage, which are caused while fabricating a heterojunction type HFET device. A semiconductor device includes a buffer layer, an AlGaN multilayer formed on the buffer layer, a GaN channel layer formed on the AlGaN multilayer, and an AlGaN barrier layer formed on the AlGaN multilayer, wherein aluminum (Al) composition of the AlGaN multilayer changes along a direction that the AlGaN multilayer is deposited.Type: ApplicationFiled: January 5, 2015Publication date: July 16, 2015Inventors: Junho KIM, Seongmoo CHO, Taehoon JANG, Eujin HWANG, Jaemoo KIM
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Patent number: 8841179Abstract: A semiconductor device including a first GaN layer, an AlGaN layer, a second GaN layer, a gate electrode, a source electrode, and a drain electrode sequentially stacked on a substrate, capable of improving a leakage current and a breakdown voltage characteristics generated in the gate electrode by locally forming a p type GaN layer on the AlGaN layer, and a manufacturing method thereof, and a manufacturing method thereof are provided. The semiconductor device includes: a substrate, a first GaN layer formed on the substrate, an AlGaN layer formed on the first GaN layer, a second GaN layer formed on the AlGaN layer and including a p type GaN layer, and a gate electrode formed on the second GaN layer, wherein the p type GaN layer may be in contact with a portion of the gate electrode.Type: GrantFiled: November 9, 2012Date of Patent: September 23, 2014Assignee: LG Electronics Inc.Inventors: Seongmoo Cho, Kwangchoong Kim, Eujin Hwang, Taehoon Jang
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Publication number: 20140054600Abstract: This specification is directed to a semiconductor device capable of reducing a leakage current by forming a first GaN layer including a plurality of GaN layers and FexNy layers interposed between the plurality of GaN layers, in a semiconductor device having the first GaN layer, an AlGaN layer, a second GaN layer, a gate electrode, a source electrode and a drain electrode which are deposited in a sequential manner, and a fabricating method thereof. To this end, a semiconductor device according to one exemplary embodiment includes a first GaN layer, an AlGaN layer on the first GaN layer, a second GaN layer on the AlGaN layer, and a source electrode, a drain electrode and a gate electrode formed on a partial area of the second GaN layer, wherein the first GaN layer comprises a plurality of GaN layers and FexNy layers interposed between the plurality of GaN layers.Type: ApplicationFiled: July 22, 2013Publication date: February 27, 2014Applicant: LG Electronics Inc.Inventors: Seongmoo Cho, Taehoon Jang
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Publication number: 20130153921Abstract: A semiconductor device including a first GaN layer, an AlGaN layer, a second GaN layer, a gate electrode, a source electrode, and a drain electrode sequentially stacked on a substrate, capable of improving a leakage current and a breakdown voltage characteristics generated in the gate electrode by locally forming a p type GaN layer on the AlGaN layer, and a manufacturing method thereof, and a manufacturing method thereof are provided. The semiconductor device includes: a substrate, a first GaN layer formed on the substrate, an AlGaN layer formed on the first GaN layer, a second GaN layer formed on the AlGaN layer and including a p type GaN layer, and a gate electrode formed on the second GaN layer, wherein the p type GaN layer may be in contact with a portion of the gate electrode.Type: ApplicationFiled: November 9, 2012Publication date: June 20, 2013Inventors: Seongmoo Cho, Kwangchoong Kim, Eujin Hwang, Taehoon Jang