Patents by Inventor Seongpil CHANG

Seongpil CHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240130133
    Abstract: A vertical nonvolatile memory device may include a peripheral circuit portion including a memory cell driving circuit and connection wiring; a first hydrogen diffusion barrier layer above the peripheral circuit portion; a first insulating layer above the first hydrogen diffusion barrier layer; a common source line layer above the first insulating layer; a second hydrogen diffusion barrier layer above the first insulating layer; and a memory cell stack structure above the common source line layer and the second hydrogen diffusion barrier layer.
    Type: Application
    Filed: August 9, 2023
    Publication date: April 18, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sohyeon LEE, Seongpil CHANG, Sea Hoon LEE, Jaeduk LEE, Tackhwi LEE
  • Publication number: 20230019217
    Abstract: A non-volatile memory device comprises a memory cell region including a plurality of cell transistors, a first-type semiconductor substrate including a peripheral circuit region including circuits configured to control the plurality of cell transistors, and a plurality of pass transistors on the peripheral circuit region of the semiconductor substrate, wherein the peripheral circuit region includes a first region and a second region which are doped to a depth at an upper portion of the semiconductor substrate while being insulated from each other by an implant region, wherein the first region is a second type different from the first type, and includes a first doped region, and a first well region beneath the first doped region and configured to have a higher doping concentration than the first doped region, wherein the second region is the first type, and includes a second doped region, and a second well region beneath the second doped region and configured to have a higher doping concentration than the seco
    Type: Application
    Filed: March 31, 2022
    Publication date: January 19, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Tackhwi LEE, Jaeduk LEE, Hojun LEE, Seongpil CHANG
  • Publication number: 20090278120
    Abstract: There is provided a thin film transistor (TFT) capable of improving electron mobility and minimizing the occurrence of hysteresis due to traps. The TFT includes a channel layer and a gate insulating layer, wherein the channel layer is made of an oxide semiconductor. In the TFT, the gate insulating layer includes one or more first dielectric layer and a second dielectric layer, and the first dielectric layer has a dielectric constant different from that of the second dielectric layer.
    Type: Application
    Filed: November 5, 2008
    Publication date: November 12, 2009
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Sang Yeol LEE, Seongpil CHANG