Abstract: A bit line voltage regulation circuit achieves uniform program features and precise cell distribution by providing a high voltage to a bit line regardless of a cell state. For this purpose, the regulation circuit includes a boosting unit for generating the high voltage, a switching unit, connected between the boosting unit and the bit line of a memory cell array, for transferring the high voltage to the bit line and an amplifying unit, for detecting a voltage drop at a detection node on the bit line caused by resistance on the bit line, amplifying the detected voltage drop to produce an amplified voltage driving the switching unit.

Abstract: The present invention relates to a method of forming a dual junction region and a method of forming a transfer transistor using the same. A low-concentration junction region is formed. A high-concentration junction region is formed at a portion of the low-concentration junction region by performing a high-concentration ion implantation process an ion implantation mask for an interlayer dielectric film in which a contact hole is formed so that the portion of the low-concentration junction region is exposed. With this structure, the distance between the high-concentration junction region and the well is sufficiently secured by controlling the distance between the high-concentration junction region and the well using the width of the contact hole formed in the interlayer dielectric film. Therefore, a stable characteristic can be secured upon application of a subsequent high voltage bias.

Abstract: A bit line voltage regulation circuit achieves uniform program features and precise cell distribution by providing a high voltage to a bit line regardless of a cell state. For this purpose, the regulation circuit includes a boosting unit for generating the high voltage, a switching unit, connected between the boosting unit and the bit line of a memory cell array, for transferring the high voltage to the bit line and an amplifying unit, for detecting a voltage drop at a detection node on the bit line caused by resistance on the bit line, amplifying the detected voltage drop to produce an amplified voltage driving the switching unit.

Abstract: There is disclosed a multi-bit flash memory cell and programming method using the same. In order to solve the problems that the size of a cell per unit is increased, reliability of a device is degraded due to a high operating voltage and a circuit necessary for driving the cell becomes complicated, the multi-bit flash memory cell and programming method using the same according to the present invention stores information of various states, by interchangeably programs a drain and a source in a cell array of virtual ground type, in a structure in which that two types of cells look like connected serially by doping a floating gate in a flash memory cell with two regions of a N type and a P to type.