Patents by Inventor Ser Leng

Ser Leng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080067642
    Abstract: A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths extending outwardly beyond a peripheral edge of an encapsulant. A plurality of terminals may be positioned proximate a terminal face of the encapsulant and these terminals may be electrically coupled to the same leads. This can facilitate connection of the microelectronic component to a substrate using the leads as a conventional leaded package. The terminals, however, can facilitate stacking of the leaded package with one or more additional microelectronic components, e.g., a BGA package.
    Type: Application
    Filed: March 27, 2007
    Publication date: March 20, 2008
    Applicant: Micron Technology, Inc.
    Inventors: Eng Koon, Low Waf, Chan Yu, Chia Poo, Ser Leng, Zhou Wei
  • Publication number: 20080054423
    Abstract: Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the periphery of a die. The edge contacts are positioned in the saw streets. Each edge contact is connected to one bond pad of each die adjacent the saw street. The edge contact is divided into contacts for each adjacent die when the dies are separated. In an embodiment, a recess is formed in the saw street. In an embodiment, the recess is formed by scribing the saw street with a mechanical cutter. The recess is patterned and contact material is deposited to form the edge contacts.
    Type: Application
    Filed: November 2, 2007
    Publication date: March 6, 2008
    Inventors: Chia Poo, Boon Jeung, Low War, Chan Yu, Nao Loo, Eng Koon, Ser Leng, Chua Kwang, So Chung, Hu Seng
  • Publication number: 20070120247
    Abstract: Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads.
    Type: Application
    Filed: January 26, 2007
    Publication date: May 31, 2007
    Inventors: Chan Yu, Ser Leng, Low Waf, Chia Poo, Eng Koon
  • Publication number: 20060084240
    Abstract: Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the periphery of a die. The edge contacts are positioned in the saw streets. Each edge contact is connected to one bond pad of each die adjacent the saw street. The edge contact is divided into contacts for each adjacent die when the dies are separated. In an embodiment, a recess is formed in the saw street. In an embodiment, the recess is formed by scribing the saw street with a mechanical cutter. The recess is patterned and contact material is deposited to form the edge contacts.
    Type: Application
    Filed: November 17, 2005
    Publication date: April 20, 2006
    Inventors: Chia Poo, Boon Jeung, Low Waf, Chan Yu, Neo Loo, Eng Koon, Ser Leng, Chua Kwang, So Chung, Ho Seng
  • Publication number: 20050230808
    Abstract: Methods of forming a semiconductor assembly are described which include a leadframe with leads having offset portions exposed at an outer surface of a material package to form a grid array. An electrically conductive compound, such as solder, may be disposed or formed on the exposed lead portions to form a grid array such as a ball grid array (“BGA”) or other similar array-type structure of dielectric conductive elements. The leads may have inner bond ends including a contact pad thermocompressively bonded to a bond pad of the semiconductor chip to enable electrical communication therewith and a lead section with increased flexibility to improve the thermocompressive bond. The inner bond ends may also be wirebonded to the bond pads.
    Type: Application
    Filed: June 16, 2005
    Publication date: October 20, 2005
    Inventors: Chan Yu, Ser Leng, Low Waf, Chia Poo, Eng Koon
  • Publication number: 20050029668
    Abstract: Methods for forming an edge contact on a die and edge contact structures are described. The edge contacts on the die do not increase the height of the die. The edge contacts are positioned on the periphery of a die. The edge contacts are positioned in the saw streets. Each edge contact is connected to one bond pad of each die adjacent the saw street. The edge contact is divided into contacts for each adjacent die when the dies are separated. In an embodiment, a recess is formed in the saw street. In an embodiment, the recess is formed by scribing the saw street with a mechanical cutter. The recess is patterned and contact material is deposited to form the edge contacts.
    Type: Application
    Filed: August 30, 2004
    Publication date: February 10, 2005
    Inventors: Chia Poo, Boon Jeung, Low Waf, Chan Yu, Neo Loo, Eng Koon, Ser Leng, Chua Kwang, So Chung, Ho Seng
  • Publication number: 20050026325
    Abstract: A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths extending outwardly beyond a peripheral edge of an encapsulant. A plurality of terminals may be positioned proximate a terminal face of the encapsulant and these terminals may be electrically coupled to the same leads. This can facilitate connection of the microelectronic component to a substrate using the leads as a conventional leaded package. The terminals, however, can facilitate stacking of the leaded package with one or more additional microelectronic components, e.g., a BGA package.
    Type: Application
    Filed: August 19, 2004
    Publication date: February 3, 2005
    Inventors: Eng Koon, Low Waf, Chan Yu, Chia Poo, Ser Leng, Zhou Wei