Patents by Inventor Serge Bernard Lasserre

Serge Bernard Lasserre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Master circuits having dynamic priority leads coupled with memory controller
    Patent number: 9141561
    Abstract: A system includes multiple master devices and at least one memory refresh scheduler. When a master device needs higher priority for memory access, the master device sends a dynamic priority signal to the memory refresh scheduler and in response, the memory refresh scheduler changes its policy for issuing refresh commands.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: September 22, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Serge Bernard Lasserre, Marouane Berrada, Stephen Busch, Denis Beaudoin
  • DYNAMIC PRIORITY MANAGEMENT OF MEMORY ACCESS
    Publication number: 20140122790
    Abstract: A system includes multiple master devices and at least one memory refresh scheduler. When a master device needs higher priority for memory access, the master device sends a dynamic priority signal to the memory refresh scheduler and in response, the memory refresh scheduler changes its policy for issuing refresh commands.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 1, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Serge Bernard Lasserre, Marouane Berrada, Stephen Busch, Denis Beaudoin