Abstract: A TX/RX RF switch that may include a reception path; and a transmission path that has an antenna port, a transmission input port, and transmission transistors. The transmission transistors have source-bulk connections. The reception path has an antenna port, a reception output port, and reception transistors. The reception path includes a first reception transistor that is closest to the antenna port, out of the reception transistors, and has a source-bulk connection, and at least one other reception transistor that has a bulk-to-ground connection. The reception transistors and the transmission transistors are CMOS transistors.

Abstract: A low noise amplifier that may include a first input port, a second input port, a first capacitor, a second capacitor, a first variable capacitor, a second variable capacitor, an inductor, a bias circuit, a tuning circuit, a first output circuit having a first output, a second output circuit having a second output; wherein the first input port is electrically coupled to a first end of the second variable capacitor, to a first end of the first capacitor, to an input of the first output circuit, and to a first port of the inductor; wherein the second input port is electrically coupled to a second end of the first variable capacitor, to a second end of the second capacitor, to an input of the second output circuit, and to a second port of the inductor; wherein a first port of the first varactor is electrically coupled to a second end of the first capacitor; wherein a second port of the second varactor is electrically coupled to a first end of the second capacitor; wherein the bias circuit is configured to supply

Abstract: A low noise amplifier that includes a first cascode, a second cascode, an input circuit, an output node, a first switch, and a second switch. A source of a first common gate transistor and a drain of a first common source transistor of the first cascode are coupled to a first node of the low noise amplifier. The output node is coupled to a drain of the first common gate transistor, and to a drain of a second common gate transistor of the second cascode, thereby coupling the first cascode and the second cascode to a power supply via a load. The first switch is coupled between a gate of the first common gate transistor and the power supply. The second switch is coupled between the first node and the power supply. The first switch is configured to be open and the second switch is configured to be closed when the low noise amplifier operates at a first operational node.

Abstract: There is provided a RF-DAC that may include (i) a first PAM that includes a first group of first power amplifiers of different amplifications, (ii) a second PAM that includes a second group of second power amplifiers of different amplifications; (iii) a load that includes an output port and a transformer; (iv) power amplifiers control units, and a transformer control unit.

Abstract: A TX/RX RF switch that may include a reception path; and a transmission path that has an antenna port, a transmission input port, and transmission transistors. The transmission transistors have source-bulk connections. The reception path has an antenna port, a reception output port, and reception transistors. The reception path includes a first reception transistor that is closest to the antenna port, out of the reception transistors, and has a source-bulk connection, and at least one other reception transistor that has a bulk-to-ground connection. The reception transistors and the transmission transistors are CMOS transistors.

Abstract: A low noise amplifier that may include a first input port, a second input port, a first capacitor, a second capacitor, a first variable capacitor, a second variable capacitor, an inductor, a bias circuit, a tuning circuit, a first output circuit having a first output, a second output circuit having a second output; wherein the first input port is electrically coupled to a first end of the second variable capacitor, to a first end of the first capacitor, to an input of the first output circuit, and to a first port of the inductor; wherein the second input port is electrically coupled to a second end of the first variable capacitor, to a second end of the second capacitor, to an input of the second output circuit, and to a second port of the inductor; wherein a first port of the first varactor is electrically coupled to a second end of the first capacitor; wherein a second port of the second varactor is electrically coupled to a first end of the second capacitor; wherein the bias circuit is configured to supply

Abstract: A low noise amplifier that includes a first cascode, a second cascode, an input circuit, an output node, a first switch, and a second switch. A source of a first common gate transistor and a drain of a first common source transistor of the first cascode are coupled to a first node of the low noise amplifier. The output node is coupled to a drain of the first common gate transistor, and to a drain of a second common gate transistor of the second cascode, thereby coupling the first cascode and the second cascode to a power supply via a load. The first switch is coupled between a gate of the first common gate transistor and the power supply. The second switch is coupled between the first node and the power supply. The first switch is configured to be open and the second switch is configured to be closed when the low noise amplifier operates at a first operational node.

Abstract: An integrated circuit that includes a die with an active radio frequency (RF) unit embedded thereon; a first port for receiving an output signal from the active RF unit; a harmonic filter that comprises a first harmonic filter inductor; and a first RF inductive load that is electrically coupled to the first port and is magnetically coupled to the first harmonic filter inductor.

Abstract: An integrated circuit RF power amplifier that includes a substrate; a low power (LP) amplifier; a high-power (HP) amplifier; and an asymmetrical parallel-combining transformer. The substrate is configured to supports the LP amplifier, the HP amplifier and the asymmetrical parallel-combining transformer. The LP amplifier is configured to amplify a LP RF input signal to provide a LP amplified signal. The HP amplifier is configured to amplify a HP RF input signal to provide a HP amplified signal. The HP amplified signal has maximal intensity that exceeds a maximal intensity of the LP amplified signal.

Abstract: An integrated circuit RF power amplifier that includes a substrate; a low power (LP) amplifier; a high-power (HP) amplifier; and an asymmetrical parallel-combining transformer. The substrate is configured to supports the LP amplifier, the HP amplifier and the asymmetrical parallel-combining transformer. The LP amplifier is configured to amplify a LP RF input signal to provide a LP amplified signal. The HP amplifier is configured to amplify a HP RF input signal to provide a HP amplified signal. The HP amplified signal has maximal intensity that exceeds a maximal intensity of the LP amplified signal.

Abstract: An integrated circuit that includes a die with an active radio frequency (RF) unit embedded thereon; a first port for receiving an output signal from the active RF unit; a harmonic filter that comprises a first harmonic filter inductor; and a first RF inductive load that is electrically coupled to the first port and is magnetically coupled to the first harmonic filter inductor.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 wireless local area network (WLAN), third generation (3G) and fourth generation (4G) cellular standards, BLUETOOTH™, ZIGBEE™, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard Complementary metal-oxide-semiconductor (CMOS) processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A novel and useful linear, efficient, smart wideband CMOS hybrid power amplifier that combined an analog linear amplification path and a digital power amplification (DPA) path. PA path control logic analyzes the input I and Q signals and determines which amplification paths to steer the input I and Q signals to. The analog linear amplification path comprises digital to analog converters for both I and Q paths and one or more analog linear power amplifiers. The digital power amplification path comprises I and Q up-sampling circuits and I and Q RF DAC circuits (e.g., digital PA circuits). In operation, the PA path control logic compares the I and Q signals to thresholds (which may or may not be different) and based on the comparisons, selects one or more paths for the input I and Q signals. Whether the signals from the analog and digital amplification paths are to be combined or selected (i.e.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: A novel and useful radio frequency (RF) front end module (FEM) circuit that provides high linearity and power efficiency and meets the requirements of modern wireless communication standards such as 802.11 WLAN, 3G and 4G cellular standards, Bluetooth, ZigBee, etc. The configuration of the FEM circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes. The FEM circuit includes a power amplifier made up of one or more sub-amplifiers having high and low power circuits and whose outputs are combined to yield the total desired power gain. An integrated multi-tap transformer having primary and secondary windings arranged in a novel configuration provide efficient power combining and transfer to the antenna of the power generated by the individual sub-amplifiers.

Abstract: An integrated circuit that includes a die with an active radio frequency (RF) unit embedded thereon; a first port for receiving an output signal from the active RF unit; a harmonic filter that comprises a first harmonic filter inductor; and a first RF inductive load that is electrically coupled to the first port and is magnetically coupled to the first harmonic filter inductor.

Abstract: An integrated circuit that includes a die with an active radio frequency (RF) unit embedded thereon; a first port for receiving an output signal from the active RF unit; a harmonic filter that comprises a first harmonic filter inductor; and a first RF inductive load that is electrically coupled to the first port and is magnetically coupled to the first harmonic filter inductor.

Abstract: The present invention is a novel and useful RF transformer based transmit/receive (TX/RX) integrated RF switch. In one embodiment of the invention, the TX/RX RF switch circuit is based on the use of an RF transformer which functions as (1) the PA output transformer during TX mode and (2) as a series inductance in an LNA matching network during receive mode. Thus, the RF transformer plays a dual function or role. Antenna diversity is achieved by having multiple antennas each having an associated antenna switch connected to the output transformer. The TX/RX switch of the invention reduces the number of switches required for antenna diversity to a minimum and minimizes RF losses in the system. The TX/RX switch is suitable for use with modern wireless communication standards such as DECT, 802.11 WLAN, Bluetooth, ZigBee, etc. The configuration of the TX/RX circuit permits the use of common, relatively low cost semiconductor fabrication techniques such as standard CMOS processes.

Abstract: A novel and useful linear, efficient, smart wideband CMOS hybrid power amplifier that combined an analog linear amplification path and a digital power amplification (DPA) path. PA path control logic analyzes the input I and Q signals and determines which amplification paths to steer the input I and Q signals to. The analog linear amplification path comprises digital to analog converters for both I and Q paths and one or more analog linear power amplifiers. The digital power amplification path comprises I and Q up-sampling circuits and I and Q RF DAC circuits (e.g., digital PA circuits). In operation, the PA path control logic compares the I and Q signals to thresholds (which may or may not be different) and based on the comparisons, selects one or more paths for the input I and Q signals. Whether the signals from the analog and digital amplification paths are to be combined or selected (i.e.